Senior Staff Engineer, Digital Verification and Methodology. Join a collaborative team that values diverse perspectives and leads functional verification for advanced integrated circuits while scaling reusable methodologies across global development sites Lead end-to-end verification strategy from requirements analysis through sign-off Architect reusable SystemVerilog UVM environments and scalable object-oriented testbenches Implement constrained-random and assertion-based verification with robust functional coverage Drive metric-driven coverage closure and establish clear quality criteria Translate specifications and microarchitecture into tests, checkers, coverage models, and sign-off evidence Improve verification methodologies, automation, and tool flows across projects and development sites Collaborate with design, firmware, and system teams to debug issues and ensure reliable hardware-software interaction You bring analytical thinking, clear communication, and collaborative problem-solving. You thrive in a globally distributed environment and build trust across functions while driving results Mandatory: Bachelor's or master's degree in electrical engineering, Computer Engineering, Computer Science, or a related technical field Mandatory: 5+ years in ASIC, SoC, or FPGA functional verification with ownership of complex block, subsystem, or chip-level deliverables Mandatory: Expert proficiency in SystemVerilog, UVM, object-oriented testbench architecture, constrained-random verification, functional coverage, and assertion-based verification Mandatory: Ability to translate specifications and microarchitecture into verification plans, environments, tests, checkers, coverage models, and sign-off evidence Mandatory: Written and spoken English at C1 level Preferred: Strong debugging skills with a major simulation and debug toolchain and proficiency in Linux development and scripting or programming with Python, Tcl, Bash, C, or C++ for automation Nice-to-have: Experience with RTL design and digital architecture plus exposure to Ethernet or complex protocols, security verification for cryptographic accelerators or secure subsystems, power-aware verification using UPF, and practical use of AI or machine learning and AI-enabled EDA tools We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity. Our hiring decisions are based on skills and experience. Even if you don't meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process. Learn more about our various contact channels and about Diversity & Inclusion at Infineon. Alan Olivarez https://www.linkedin.com/in/alan-olivarez-91b328203/