Jobs in the United States

25+ jobs

Save this search

Added 12 mins ago
SA
Senior Forward Deployed Engineer
Sinch America Inc.
Denver, CO
- $155,000 to $186,000 USD / year
Engineer for production. Design for capacity, scalability, availability, resilience, idempotency, retries, timeouts, rate limits, backpressure, secrets management, least privilege, and safe…
Added 21 mins ago
Site Representative Systems Engineer
SAIC
Tucson, AZ
SAIC has a need for a highly experienced Site Representative Systems Engineer to support to an exciting and impactful customer mission on the Horizon 2 contract. The Horizon 2 contract…
Added 30 mins ago
Sr. Process Engineer - Aluminum Extrusion
Shape Corporation
Trenton, OH
launch vehicle programs in the world and are seeking an experienced Aluminum Extrusion Process Engineer to join their manufacturing team. This role is responsible for driving process…
Added 30 mins ago
Customer Quality Engineer
Shape Corporation
Grand Haven, MI
As a member of the Program core team the CQE (Customer Quality Engineer) represents the voice of the customer within the Shape organization, acting as the key interface between the customer…
Added 30 mins ago
Product Development Engineer
Shape Corporation
Novi, MI
Responsible for new product development and associated engineering requirements, including design verification for engineering changes to current production products. Act as the company's…
Added 30 mins ago
Development Program Engineer
Shape Corporation
Trenton, OH
…development and associated engineering requirements, including design verification for engineering changes to current production products. As well as acting as the company's engineering…
Added 30 mins ago
Development Program Engineer
Shape Corporation
Tanner, AL
…development and associated engineering requirements, including design verification for engineering changes to current production products. As well as acting as the company's engineering…
Added 33 mins ago
Mechanical Design Engineer (Experienced & Senior)
The Boeing Company
Berkeley, MO
Boeing Test & Evaluation (BT&E) is looking for a Mechanical Design Engineer to support the Environmental Test Design Engineering team in Berkeley, MO.
Added 37 mins ago
Cloud DevOps Engineer - AWS & Python
U.S. Bank
Earth City, MO
U.S. Bank is seeking a Cloud DevOps Engineer, AWS & Python to join the ISS DevOps / Cloud Enablement Engineering Team. This specialized engineering team partners with application,…
Added 58 mins ago
Principal Automation Engineer Optical Inspection SME
J&J Family of Companies
Wilson, NC
Senior Automation Engineer will lead internal team members, suppliers, OEMs, system integrators, Digital/IT partners, automation-system owners, and cross-functional stakeholders to deliver…
Added 1 hour ago
SR
LEAD ENGINEER - PRINCIPAL ENGINEER - Laser Development Engineer - Boulder, CO
Southwest Research I
Boulder, CO
- $121,451 to $226,720 USD / year
3+ years: Design of laser systems to requirements, verification planning, and execution.
Added 1 hour ago
SR
LEAD ENGINEER - Instrument Systems Engineer - Boulder, CO
Southwest Research I
Boulder, CO
- $121,451 to $202,446 USD / year
Lead the design, integration & test, and deploy a new generation of space weather instruments.
Added 1 hour ago
M
Critical Environment Electrical Engineering
Microsoft
ON, CA
- $85,800 to $169,300 CAD / year
…every day and we need you as a Critical Environment Electrical Engineer (Energy…
Added 1 hour ago
M
Senior Critical Environment Mechanical Engineer
Microsoft
ON, CA
- $114,400 to $203,900 CAD / year
…based on audits and information from product development and verification processes. Reviews and provides feedback on other engineer's…
Added 1 hour ago
Systems Engineer
Avalore, LLC
Arlington, VA
The Systems Engineer will conduct comprehensive systems engineering activities to support the WDP platform. This person will translate customer requirements into detailed system designs,…
Added 1 hour ago
M
Principal Design Verification Engineer
Microsoft
NC · TX · Raleigh, NC · Austin, TX · Raleigh · Austin
- $142,800 to $304,200 USD / year
We are looking for a Principal Design Verification Engineer to join the team.
Added 1 hour ago
System Engineer, Level 1
Avalore, LLC
Annapolis Junction, MD
Technical Process Area - Stakeholder Requirements Definition, Requirements Analysis, Architectural Design, Implementation, Integration, Verification, Transition, Validation, Operation,…
Added 1 hour ago
System Engineer, Level 2
Avalore, LLC
Annapolis Junction, MD
Technical Process Area - Stakeholder Requirements Definition, Requirements Analysis, Architectural Design, Implementation, Integration, Verification, Transition, Validation, Operation,…
Added 1 hour ago
System Engineer, Level 3
Avalore, LLC
Annapolis Junction, MD
Technical Process Area - Stakeholder Requirements Definition, Requirements Analysis, Architectural Design, Implementation, Integration, Verification, Transition, Validation, Operation,…
Added 1 hour ago
System Engineer, Level 4
Avalore, LLC
Annapolis Junction, MD
Technical Process Area - Stakeholder Requirements Definition, Requirements Analysis, Architectural Design, Implementation, Integration, Verification, Transition, Validation, Operation,…
Added 1 hour ago
System Engineer, Level 5
Avalore, LLC
Annapolis Junction, MD
Technical Process Area - Stakeholder Requirements Definition, Requirements Analysis, Architectural Design, Implementation, Integration, Verification, Transition, Validation, Operation,…
Added 1 hour ago
M
Senior Principal Verification Engineer
Microsoft
NC · TX · Raleigh, NC · Austin, TX · Raleigh · Austin
- $165,600 to $331,200 USD / year
We are looking for a Senior Principal Verification Engineer to join the team to support our mission and culture.
Added 1 hour ago
M
Software Engineer - CTJ - Top Secret
Microsoft
VA · Reston, VA · Reston
- $85,400 to $183,700 USD / year
…sensitive and mission‑critical environments? As a Software Engineer in Microsoft’s Specialized Cloud team, you’ll help design, deliver, and secure highly reliable services that underpin…
Added 1 hour ago
M
Senior Hardware Engineer
Microsoft
CA · NC · OR · Mountain View, CA · Raleigh, NC · Hillsboro, OR · Mountain View · Raleigh · Hillsboro
- $119,800 to $261,000 USD / year
The Methodology, Infrastructure, Silicon Engineering, and Labs engineering (MILE) team delivers the physical design CAD flows, tools, and infrastructure that Microsoft’s silicon design…
Added 1 hour ago
M
Principal Design Engineer
Microsoft
NC · CA · Raleigh, NC · Mountain View, CA · Raleigh · Mountain View
- $142,800 to $304,200 USD / year
We are looking for a Principal Design Engineer to join the team.

Synopsys

ASIC Physical Design, Principal Engineer

Sunnyvale, CA, United States

Apply About employer

Applications open in a new tab.

Job details

Experience: MSEE with 10+ years or BSEE with 12+ years of digital or physical design experience, with recent contributions to project tapeouts
Posting language: English
Posted: Nov 6, 2026

Original job description

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent over a decade taking SerDes and high-speed interface IP from RTL to silicon, and you know that the hardest problems are not the ones in the datasheet. They are the ones that show up at 16nm when your timing closure strategy collides with a power domain you did not account for, or when a customer integration uncovers an assumption you made six months ago that no longer holds. You are the engineer who catches those problems early, not because you are paranoid, but because you have seen what happens when they slip through. You think in terms of flows, not just tasks. You know how to write the constraints that actually work, not just pass checks. You have debugged analog-digital interfaces enough times to respect the boundary and know when to pull in the right person instead of guessing. You can talk architecture with front-end teams, timing with CAD, and integration pain points with a customer who is three weeks from tapeout and needs a real answer, not a workaround. At Synopsys, you will work on 112G and 224G PAM4/6 SerDes IP at nodes where every decision about placement, clocking, and power matters. The team is technical, the problems are real, and what you build will ship in products that move data at scale. What You'll Be Doing

Own physical integration for advanced SerDes IP from floorplanning through GDSII, including timing closure, power optimization, and signoff at 16nm and below
Drive RTL-to-GDSII flows for 56G, 112G, and 224G PAM4/6 SerDes across FinFET nodes, working closely with front-end, analog, and CAD teams to resolve integration challenges
Develop and validate timing constraints, clock architectures, and low-power design techniques that meet customer PPA targets and enable first-pass silicon success
Lead customer engagements on physical integration topics, including SOC-level integration planning, constraint delivery, and tapeout support
Build and improve design methodologies, automation scripts (Perl, Tcl, Python), and flows that reduce customer effort and improve delivery predictability
Debug and resolve complex analog-digital interface issues in collaboration with analog design and verification teams
Mentor engineers across the team on physical design best practices, timing closure strategies, and advanced node challenges

The Impact You Will Have

Your physical integration work will enable high-speed SerDes IP to meet aggressive PPA targets in customer SoCs across data center, AI, and networking applications
You will reduce customer integration effort and risk by delivering robust constraints, proven flows, and clear guidance that accelerates their tapeout schedules
Your methodology improvements and automation will make the entire team faster and more consistent, reducing rework and late-stage surprises
You will help shape the technical direction of future SerDes products by identifying architectural and flow improvements based on real tapeout learnings
Your customer interactions will surface integration challenges early, allowing the team to address them in IP rather than forcing workarounds downstream
You will build technical depth across the team by sharing what you have learned from advanced node tapeouts and complex mixed-signal integration
Your work will directly contribute to the success of Synopsys SerDes IP in the most demanding, highest-performance applications in the industry

What You'll Need

MSEE with 10+ years or BSEE with 12+ years of digital or physical design experience, with recent contributions to project tapeouts
Deep hands-on experience with the full RTL-to-GDSII flow, including chip-level integration, timing closure, and physical signoff
Proven experience with advanced FinFET nodes (TSMC 16nm or below), including low-power design techniques and process-specific challenges
Strong understanding of timing constraint development, clock architecture, and design techniques required to meet power and area targets
Experience leading technical initiatives or projects, with a track record of driving decisions and delivering results on schedule
Solid understanding of digital and mixed-signal verification flows, SOC integration challenges, and analog-digital interface considerations
Strong scripting and automation skills in Perl, Tcl, or Python, with a methodology-driven approach to design and CAD flows

Who You Are

You can walk into a customer meeting three weeks before tapeout, understand their integration issue in fifteen minutes, and give them a path forward that actually works
You make decisions with incomplete information because you know waiting for perfect clarity is not an option, and you are comfortable owning the call
You know when a timing problem is a constraint problem, a floorplan problem, or an architecture problem, and you do not waste time solving the wrong one
You push back when a plan does not make sense, whether it is a schedule, a methodology, or a customer request that will create more problems than it solves
You can explain a complex physical design tradeoff to an analog engineer, a front-end architect, and a customer program manager, and have all three understand what matters to them
You are comfortable with international travel when customer engagements or team collaboration require it

The Team You'll Be Part Of You will be part of the Enterprise SerDes IP team, a group responsible for delivering high-speed interface IP across 56G, 112G, and 224G standards. The team works closely with front-end design, analog engineering, CAD, and product teams, as well as directly with customers on integration and tapeout support. Your work will involve collaboration across multiple internal functional groups and regular interaction with both internal and external customers. Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.