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Senior Hardware Validation Engineer
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Stellantis

High Performance Computer (HPC) Technical Development Manager

Auburn Hills, MI, United States

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Job details

Experience: Minimum of 8 years of overall related experience
Posting language: English

Original job description

The HPC Technical Development Manager will lead the end-to-end technical development, integration and delivery of the Brain 1.2 HPC High-Performance Computer.

This position serves as the central technical integrator for the HPC product, working across Hardware, Software, Systems Engineering, Architecture, Validation, Quality, Manufacturing, Purchasing and suppliers to ensure the product achieves its Quality, Cost, Timing and Performance (QCTP) objectives.

The TDM will work closely with the Brain 1.2 Chief Module Engineer (CME), HW and SW TPMs (Technical Project Managers), architects and supplier engineering teams to drive technical convergence from requirements and architecture through design, integration, validation and production readiness.

What You’ll Work On

Lead HPC technical development and integration across hardware, software, systems, cybersecurity, diagnostics, functional safety, validation and vehicle integration, ensuring the design converges to Brain 1.2 program objectives.
Own overall HPC technical maturity and readiness, coordinating requirements, architecture, interfaces, HW/SW integration, validation status, open technical issues and technical dependencies against program milestones.
Drive cross-functional technical convergence and decision-making, partnering with the CME, HW Technical project manager TPM, SW Technical project manager TPM, Design release engineers, architects, validation, quality, manufacturing, purchasing and supplier teams to identify risks, resolve technical roadblocks and escalate decisions when required.
Manage major technical changes and trade-offs, including architecture, component, MCU, hardware and software changes, assessing impact to QCTP, validation, industrialization and program timing and establishing clear recovery plans.
Drive HPC HW/SW integration and milestone readiness, ensuring hardware availability, software compatibility, integration maturity and validation plans are aligned for prototype, vehicle and production milestones.
Maintain clear technical status and governance, including technical KPIs, maturity assessments, risks, decisions, dependencies and recovery actions, and provide concise status and recommendations to Brain 1.2 leadership.

Key Responsibilities

Technical Product Leadership

Maintain the integrated technical view of the HPC.
Ensure HPC system, hardware and software requirements remain aligned.
Coordinate resolution of interface and architectural issues.
Challenge technical solutions where QCTP objectives are at risk.
Drive closure of technical gaps before program milestones.

Hardware / Software Integration

Work closely with the HW TPM on:

Hardware design maturity
Prototype and sample availability
DV/PV planning
Hardware bring-up
Component and MCU readiness
Manufacturing and industrialization dependencies

Work closely with the SW TPM on:

Software development and release maturity
BSP, drivers, middleware and application integration
HW/SW interface readiness
Software dependencies and supplier deliveries
Software validation and release readiness

Technical Risk & Issue Management

Identify HPC technical risks and dependencies early.
Develop mitigation and recovery plans with responsible engineering teams.
Drive cross-functional root-cause resolution.
Escalate unresolved technical decisions with clear alternatives and QCTP impacts.
Ensure technical decisions and changes are properly captured and communicated.

Validation & Product Readiness

Coordinate system-level maturity with validation teams.
Ensure requirements, implementation and validation evidence converge.
Track technical readiness against key program milestones.
Ensure open issues have owners, containment plans and closure timing.
Support final technical recommendation for milestone readiness.

Supplier Technical Management

Serve as a primary technical integration interface across the relevant HPC supplier ecosystem.
Ensure supplier deliverables align with Stellantis architecture, requirements and integration plans.
Coordinate resolution of cross-supplier HW/SW interface issues.
Drive technical workshops and recovery actions where supplier deliverables threaten program objectives.

Basic Qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Mechanical Engineering or a related engineering discipline.
Minimum of 8 years of overall related experience
Strong automotive product-development experience, preferably involving ECUs, embedded systems, vehicle electrical/electronic architecture or software-defined vehicle platforms.
Demonstrated experience leading complex technical development across hardware, software, systems and validation teams.
Strong understanding of automotive ECU development, including requirements, architecture, design, integration, verification and validation.
Proven ability to influence and drive cross-functional engineering teams without direct reporting authority.
Strong problem-solving, technical decision-making, communication and executive presentation skills.

Preferred Qualifications:

Master's degree in Electrical Engineering, Computer Engineering, Systems Engineering or Engineering Management.
Experience with zonal architectures, central computing or software-defined vehicle architectures.
Knowledge of embedded MCU/SoC platforms, networking, CAN/Ethernet, diagnostics, cybersecurity and functional safety.
Experience managing transitions between hardware architectures or MCU platforms.
Experience working with global engineering organizations and Tier 1 / semiconductor / software suppliers.
Familiarity with automotive development processes including DFMEA, DV/PV, APQP, change management and production launch.

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Jobs in the United States