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Added 6 hours ago
Hardware Engineer
Root Access
New York City, NY
We’re looking for a Hardware Engineer to develop electronic products from concept through production. You’ll own circuit design, PCB development, prototype bring-up, and hardware validation…
Added 7 hours ago
Principal Engineer Test
Northrop Grumman
Salt Lake City
Northrop Grumman Mission Systems (NGMS) offers a challenging career opportunity as a Principal Test Engineer in our Operations Electronics & Avionics Engineering team at our Salt Lake City,…
Added 8 hours ago
ASIC Design Engineer
Microchip - USA
CA
Join the Design Engineering team as Technical Staff Engineer-Design supporting semiconductor architecture, RTL and circuit design, integration, verification, performance, power, area,…
Added 9 hours ago
Digital Failure Analysis Engineer (Dallas/Richardson)
Texas Instruments
Richardson, TX
Texas Instruments is seeking a skilled Digital Failure Analysis (FA) engineer to join their team in Lehi, Utah. We're at the forefront of an exciting era of growth and innovation at LFAB…
Added 9 hours ago
Entry-Level Application Engineer – Semiconductor Test
Advantest
San Jose, CA
We are seeking a motivated Entry-Level Application Engineer to join our System Applications Engineering team. This role is ideal for a recent graduate or early-career engineer interested in…
Added 10 hours ago
Senior Hardware Design Engineer
Cisco Systems, Inc.
Milpitas, CA
Familiarity with Design for Manufacturability (DFM) and Design for Testability (DFT) principles.
Added 10 hours ago
Electrical Engineer - Motor Drives, Controls & Systems
The AMES Companies, Inc.
Smyrna, TN
Apply sound engineering principles and DFx (DFM, DFT, DFA) to deliver designs that are reliable, safe, and compliant with regulatory standards.
Added 11 hours ago
Sr. Staff NPI Manufacturing Engineer
Halo Industries, Inc.
Santa Clara, CA
The Sr. Staff NPI Manufacturing Engineer plays a pivotal strategic and technical leadership role in scaling our proprietary capital equipment platform. Responsible for architecting the…
Added 11 hours ago
Principal Engineer Test
CORP-Corporate Office
United States
Northrop Grumman Mission Systems (NGMS) offers a challenging career opportunity as a Principal Test Engineer in our Operations Electronics & Avionics Engineering team at our Salt Lake City,…
Added 12 hours ago
DFT Engineer
Broadcom Corporation
United States
Broadcom's ASIC Product Division is seeking candidates for a DFT Engineer position at our San Jose, California Development Center. The successful candidate will participate in SoC DFT…
Added 12 hours ago
ASIC DFT Engineer
Broadcom Corporation
United States
Broadcom's ASIC Product Division is seeking candidates for a DFT Engineer position at our San Jose, California Development Center. The successful candidate will participate in SoC DFT…
Added 12 hours ago
ATE Engineer - XPU (Yield, Quality & RMA)
Broadcom Corporation
United States
ATE Test Engineer – XPU Yield, Quality, and RMA Debug
Added 12 hours ago
ATE Engineer - XPU (Yield, Quality & RMA)
Broadcom Corporation
United States
ATE Test Engineer – XPU Yield, Quality, and RMA Debug
Added 12 hours ago
ASIC DFT Engineer
Broadcom Corporation
United States
Broadcom's ASIC Product Division is seeking candidates for a DFT Engineer position at our San Jose, California Development Center. The successful candidate will participate in SoC DFT…
Added 12 hours ago
RF Hardware Engineer 2
Emerson
Austin, TX
End‑to‑end ownership from concept to ramp of RF products; DFM/DFT/NPI and supplier engagement experience.
Added 12 hours ago
Sr Manufacturing Engineer , AWS Board Core Design Team
Amazon Data Services, Inc.
Austin, TX · Seattle, WA · Cupertino, CA
…manufacturing engineering to the next level. As a Senior Manufacturing Engineer on the AWS Board Core Design team (Core Components Group), you will develop, deploy, qualify, and…
Added 12 hours ago
Manufacturing Engineer , AWS Board Core Design Team
Amazon Data Services, Inc.
Seattle, WA · Cupertino, CA
…manufacturing engineering to the next level. As a Manufacturing Engineer on the AWS Board Core Design team (Core Components Group), you will develop, deploy, qualify, and continuously…
Added 12 hours ago
Manufacturing Engineer II, III, Sr. - Combustion Devices
Blue Origin Personnel, LLC
Huntsville, AL
· Contribute to design for manufacturability (DFM), design for assembly (DFA), design for test (DFT), key to building reliable engines for space exploration.
Added 14 hours ago
Data Center Hardware Engineering - Hardware System Integration Engineer
Apple
Austin, TX
…production. We're looking for a Hardware System Integration Engineer who thrives in a highly collaborative environment, enjoys working across disciplines, and is energized by the challenge…
Added 15 hours ago
SB
Electrical Engineering Manager (Onsite)
Standard Bots
Glen Cove, NY (Hybrid 3 days/week onsite), NY
- $180,000 to $230,000 USD / year
- Delegate effectively: match work to each engineer's strengths and growth, give clear ownership, and stay close enough to catch problems early without becoming the bottleneck
Added 16 hours ago
A
Principal ASIC Design Engineer
Aerospace
Plymouth, MN · Clearwater, FL
- $173,000 to $200,000 USD / year
As a Principal ASIC Design Engineer at Honeywell Aerospace, you will be a technical leader in our ASIC design team, responsible for driving innovation and excellence in ASIC design, leading…
Added 19 hours ago
Test Engineer II
Thorlabs
Newton, NJ
Provide guidance and support to Test Engineer I and technicians
Added 22 hours ago
Physical Design Engineer
Inabia Software & Consulting Inc.
San Jose, CA
Work closely with architects, RTL designers, and DFT engineers to resolve implementation and signoff issues across your blocks.
Added 22 hours ago
Design/SDC Engineer
Inabia Software & Consulting Inc.
San Jose, CA
You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock groups, exceptions, and clock exclusivity. Proficient in…
Added 22 hours ago
ES
Senior ATE Test Engineer
Elevate Semiconductor
San Diego, CA
- $125,000 to $180,000 USD / year
We are seeking a Senior Test Engineer to lead the development and execution of test solutions for precision analog and mixed-signal integrated circuits used in memory, AI, high-performance…

Closed listing

SpaceX

Sr. SOC Physical Verification Engineer (Silicon Engineering)

Palo Alto, CA, United States
Austin, TX, United States
Irvine, CA, United States
Sunnyvale, CA, United States

This opening has closed.

The original listing is kept below for reference.

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About employer

Job details

Experience: 5+ years of ASIC and/or physical design flow development experience in industry
Posting language: English
Posted: Oct 26, 2026

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Original job description

Archived listing. The details below describe a past opening.

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

SR. SOC PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING)

At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact and are looking for best-in-class engineers to help maximize Starlink’s utility for communities and businesses around the globe.

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation silicon for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.

RESPONSIBILITIES:

Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools like Calibre, ICV, or Pegasus
Develop, maintain, and optimize physical verification flows for advanced node SoC’s.
Interpret and implement foundry Design Rule Manuals (DRM) - translate rule updates into verified flow changes
Debug and resolve complex DRC/LVS violations across hierarchical full-chip designs
Perform ESD verification - validate protection strategies, current paths, and CDM/HBM compliance
Drive tapeout readiness by coordinating signoff across block and top-level and Hard IP design teams
Engage directly with foundry teams to resolve DRM ambiguities and waiver requests.
Develop/modify design flows as needed to meet the overall design quality of results and chip integration requirements.Leverage AI agents to automate rule deck validation, violation triage, and signoff reporting workflows

BASIC QUALIFICATIONS:

Bachelor’s degree in electrical engineering, computer engineering or computer science
5+ years of ASIC and/or physical design flow development experience in industry

PREFERRED SKILLS AND EXPERIENCE:

Experience and deep understanding of SOC top level physical design flows (floor-planning, I/O, bump & RDL planning, hard IP integration, partitioning, power/ground grid generation, pin assignment, DFT, partition hardening, special clock handling, feedthrough flows, special interface/interconnect planning and implementation)

• Experience in IP integration (e.g. memories, I/O’s, analog IPs, SerDes, DDR etc.)

Deep expertise in DRC, LVS, PERC and ESD verification methodologies
Hands-on proficiency with Calibre, ICV (IC Validator), or Pegasus
Direct foundry DRM experience - able to read, interpret, and implement complex rule decks
Experience at advanced nodes (4nm and below)
Experience with large SOC designs (>10M gates) with frequencies in excess of 1GHZ
Excellent scripting skills (csh/bash, Perl, Python TCL, Makefile etc.)
Self-driven individual with a can-do attitude, and an ability to work in a dynamic group environment

ADDITIONAL REQUIREMENTS:

Ability to work extended hours and weekends as needed to meet critical project milestones

COMPENSATION AND BENEFITS:

Pay range:

Physical Design Engineer/Senior: $175,000.00 - $280,000.00/per year

Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.

ITAR REQUIREMENTS:

To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.

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Skills

Regulatory compliance
Reporting
BASIC
Electrical engineering
Computer engineering
Computer science
DFT
Perl
Python

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