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Senior Director, Data Center Facilities Development
Oracle
Dover, DE
- $193,600 to $414,400 USD / year
Added 1 hour ago
Senior Inference Optimization ML Engineer
Rhoda AI
Mountain View,, CA
- Own on-robot inference. Deploy and optimize models on Jetson/Thor-class embedded compute under tight latency, power, thermal, and memory limits, and decide how work is split between the…
Added 1 hour ago
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Senior Director, Product Management
Oracle
Redwood City, CA · Seattle, WA · Pleasanton, CA · Santa Clara, CA
- $169,800 to $355,400 USD / year
Added 1 hour ago
VV
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Deputy Program Manager for Engineering (DPME) – Embedded Crypto Products
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Principal Digital Design Engineer
NAVITAS SEMICONDUCTOR USA, INC.
Torrance, CA
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…and final test, including known-good-die strategy for IVRs embedded in substrates or…
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- $120,000 to $150,000 USD / year
…innovative electronic products. You'll design, develop, and enhance embedded software, programmable logic, and electronic systems that enable high-performance, reliable solutions across a…
Added 3 hours ago
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North Kingstown, RI
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Added 4 hours ago
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Principal Network Developer
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Nashville, TN
- $102,300 to $209,500 USD / year
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Hudson, NH
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Added 4 hours ago
Senior Mechanical Engineer, Development
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Merrimack, NH · Hudson, NH
4 years (or 2 years with MS ME) designing, testing, and troubleshooting high-reliability embedded systems
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Principal Full Stack Software Engineer (P60) - Growth
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Remote, United States
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Added 7 hours ago
Senior Software Infrastructure Developer
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North District, IL
Understanding of hardware validation pipelines or embedded systems testing
Added 7 hours ago
Senior Software Test Development Engineer
NVIDIA Corporation
North District, IL
We are looking for a skilled Software Developer with strong hardware knowledge to join our diverse team passionate about developing low-level software and test infrastructure for NVIDIA's…
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Client Executive III (RapidScale) (Remote)
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Oracle Health Federal Senior Financial Analyst
Oracle
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- $83,000 to $166,100 USD / year
Added 7 hours ago
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Lead Principal Site Reliability Engineer
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Nashville, TN
- $96,300 to $264,100 USD / year
Added 8 hours ago
Senior Information Systems Security Manager (ISSM)
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Evendale, OH
…facilities, and laboratories, including standalone, isolated, embedded, and specialized systems tied to long-lived aerospace platforms and physical test and production…
Added 8 hours ago
2027 - Cybersecurity Engineering Intern - Sophomore, Junior, Senior *
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Dayton, OH · Wright Patterson AFB, OH
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Added 8 hours ago
Wind EHS Chief of Staff
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Remote, United States
Design and Implement a Lean Management System, including Hoshin-Kanri, daily management, and visual metrics, to ensure EHS priorities are embedded in the daily fabric of the business.
Added 10 hours ago
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Electrical & Computer Engineer
True Talent Solutions Partners
Los Angeles, CA
- $120,000 to $220,000 USD / year
- Experience with embedded C or C++, firmware, Linux, or Python is relevant to the work.
Added 11 hours ago
Vice President Rates and Energy Procurement
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…as required. VALUE: 15% 6. Directs the preparation of annual embedded cost of service studies for class revenue requirements and marginal cost of service studies to support proposed rate…

Rhoda AI

Senior Inference Optimization ML Engineer

Mountain View,, CA, United States

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Job details

Experience: 2+ years of experience in inference optimization, ML systems, ML compilers, or a closely related field.
Posting language: English
Posted: Nov 1, 2026

Original job description

At Rhoda AI, we’re building the next generation of generalist intelligent robots. We own the full robotics stack from high-performance hardware and robot systems to the infrastructure and state-of-the-art foundation world models that control our robots. Our robots are designed to be generalists capable of operating in complex, real-world environments and handling long-tail edge cases, made possible by our cutting edge research and end-to-end system design. We've raised over $450M and are investing aggressively in model research, infrastructure, hardware development, and manufacturing scale-up to make generalist robotics a reality.

Running large multimodal foundation models for a growing fleet of robots is expensive. We can't rely on one hardware vendor or the most expensive accelerators. We're looking for an Inference Optimization engineer to make Rhoda's models run fast, correctly, and cheaply on a wide range of hardware: AMD Instinct GPUs, Google TPUs, wafer-scale and dataflow accelerators, consumer GPUs like the RTX 5090, and the Jetson/Thor-class compute on our robots. You'll decide which chip runs which workload, and then make sure it runs well there. You'll work closely with the research, robotics, and infrastructure teams.

WHAT YOU'LL DO

Own cost-efficient inference end-to-end. Make Rhoda's foundation models (vision, video, language, proprioception, action) faster and cheaper to run, measured in latency, throughput, and cost per inference.
Port and optimize models for non-NVIDIA and lower-cost hardware. This includes AMD (ROCm, HIP, MIOpen/hipBLASLt, Composable Kernel), TPU (XLA, JAX, Pallas, PyTorch/XLA), wafer-scale and dataflow accelerators (their SDKs and compilers), and consumer Blackwell GPUs such as the RTX 5090 (FP8/FP4, small memory, multi-GPU setups over PCIe).
Own on-robot inference. Deploy and optimize models on Jetson/Thor-class embedded compute under tight latency, power, thermal, and memory limits, and decide how work is split between the robot and the cloud to meet real-time control requirements.
Evaluate hardware rigorously. Build cost/performance models (perf/$, perf/W, memory capacity and bandwidth, interconnect) for each chip and model family. Write clear recommendations on which hardware to buy or rent for serving, offline evaluation, and on-robot use.
Build hardware-portable optimizations. Write and tune kernels that work across vendors where possible (Triton, Pallas, MLIR-based compilers) and vendor-specific ones where the speedup justifies it. Handle attention, KV cache, memory layout, and fused operators on every backend.
Apply model compression for constrained hardware. Use quantization (INT8, FP8, FP4/MX formats, AWQ/GPTQ), pruning, distillation, and model or tensor parallelism so models fit and perform well on chips with less memory or limited data-type support.
Keep results correct and consistent across backends. Build tests that check numerical parity, policy quality, and robot-relevant behaviour, so a model gives the same results whichever chip it runs on.
Build benchmarking and regression infrastructure across hardware. Track latency baselines, throughput curves, and cost per inference for every model version on every target, with automated detection of regressions.
Work with research engineers to design models that stay efficient and portable from the start, for example by avoiding operators that only exist on one vendor's hardware.

WHAT WE'RE LOOKING FOR

2+ years of experience in inference optimization, ML systems, ML compilers, or a closely related field.
Deep hands-on experience with PyTorch.
Strong understanding of compute, memory bandwidth, memory capacity, and interconnect bottlenecks, and how they change from one hardware architecture to another.
Experience with model optimization techniques: quantization (INT8/FP8/FP4, AWQ), distillation, pruning, and compilation (torch.compile, XLA, TensorRT, IREE/MLIR, TVM, or vendor compilers).
Familiarity with inference serving frameworks and their support for different hardware (e.g. vLLM on ROCm/TPU, SGLang, JetStream, Triton Inference Server).
Excellent debugging and measurement skills. You can take "this is slow on chip X" or "this costs too much" and turn it into clear bottlenecks, experiments, and validated improvements.
A high-ownership, pragmatic mindset. You care about the total cost of a solution, not just peak benchmark numbers.

NICE TO HAVE (BUT NOT REQUIRED)

Experience optimizing inference for diffusion models.
Production or deep project experience with at least one accelerator stack other than NVIDIA datacenter GPUs: AMD ROCm, Google TPU, wafer-scale and dataflow accelerators, Groq, Tenstorrent, AWS Trainium/Inferentia, Intel Gaudi, or similar, or serious work deploying on consumer GPUs.
Kernel authoring on more than one backend: HIP or Composable Kernel on AMD, Pallas on TPU, Triton on both NVIDIA and AMD, CUTLASS/CuTe.
Contributions to open-source ML compilers or hardware backends (PyTorch, OpenXLA, Triton, vLLM, IREE, TVM).
Experience running inference on wafer-scale systems, TPU pods, or fleets of consumer GPUs.
Hands-on experience with Jetson/Thor-class platforms (TensorRT on Jetson, JetPack, DLA, power and thermal profiling).
Experience with multimodal or video model inference (variable-length sequences, packing/bucketing).
Speculative decoding, continuous batching, disaggregated prefill/decode, or other LLM serving optimizations.
Experience with streaming or low-latency systems for real-time robot control.
Experience working with hardware vendors on driver or compiler bugs and early-access silicon.

WHY THIS ROLE

Direct impact on cost and scale. Every gain in perf/$ you deliver lowers the cost of serving models and evaluating new ones, and of putting capable models on many more robots.
Strategic influence over hardware. Your benchmarks and recommendations will directly shape which accelerators Rhoda buys and builds on, in the cloud and on the robot.
High ownership on a small, elite team. You'll own the optimization layer that decides how fast and how cheaply our foundation models run in the real world, on every target we use.

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