Senior Physical Design Engineer

Job Title: Senior Physical Design Enginee

Location: Batavia, IL Division: NHanced

About Us:

Quantum Computing Inc. (QCi) (Nasdaq: QUBT) is an innovative, integrated photonics company that provides accessible and affordable quantum machines to the world today. QCi products are designed to operate at room temperature and low power at an affordable cost. The Company’s portfolio of core technology and products offer unique capabilities in the areas of high-performance computing, artificial intelligence, cyber security as well as remote sensing applications.

Scope of the Job:

As a Senior Physical Design Engineer, you will be responsible for the physical implementation of complex ASIC and interposer designs, from floor planning to tapeout. You will work in a highly collaborative environment, leveraging Cadence design tools and Git for version control, ensuring efficient and high-quality execution. The ideal candidate is a self-starter who thrives with minimal supervision and has a strong background in advanced node physical design methodologies.

Duties / Responsibilities:

• Drive full-chip physical implementation of 2.5D interposer and ASIC designs, including floor planning, placement, clock tree synthesis (CTS), routing, and optimization.
• Ensure design compliance with timing, power, and area (PPA) requirements, as well as DFM, DRC, and LVS constraints.
• Utilize Cadence tools (Innovus, Virtuoso, Tempus, Voltus, Pegasus, etc.) for physical design, verification, and signoff.
• Develop and execute timing closure strategies, working with STA engineers to meet performance goals.
• Optimize power distribution networks (PDN) and electromigration (EM) reliability in multi die packaging environments.
• Work with package and system engineers to optimize die-to-die interconnect, bump placement, and TSV integration.
• Collaborate with RTL designers, DFT engineers, and backend teams to ensure seamless integration.
• Implement ECOs (Engineering Change Orders) and efficiently iterate design revisions.
• Utilize Git-based version control workflows for design database management and collaborative development.
• Identify and resolve congestion, signal integrity (SI), and crosstalk issues in complex designs.
• Ensure successful tapeout by running full-chip physical verification and working with foundry partners.

Required Skills & Experience:

• 5+ years of experience in physical design, specifically in ASIC, SoC, or advanced

packaging (2.5D, 3DIC) technologies.

• Hands-on experience with Git-based version control systems for managing design

revisions.

• Experience with timing closure and signal integrity.

Additional Preferred Skills:

• Experience in 2.5D/3DIC packaging and heterogeneous integration.
• Hands-on experience with chip-package co-design methodologies.

Quantum Computing Inc. (QCi) is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status, or any other characteristic protected by applicable federal, state, or local law. Incumbent(s) in this position may be required to perform other duties and special assignments not specifically stated above. Statements outlined in this section are designated as essential job functions in accordance with the Americans with Disabilities Act of 1990.