Jobs in the United States

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Added 18 mins ago
Principal/Sr Principal Engineer Systems
Northrop Grumman
Roy, UT
The Mission Defense Team (MDT) is seeking a highly motivated and qualified system engineer to serve as a Hardware Assurance Engineer. You will be responsible for assessing and prioritizing…
Added 53 mins ago
Design-for-Test (DFT) Engineer - ASIC Backend – (Associate, Experienced, or Lead)
The Boeing Company
El Segundo, CA
Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple Design-for-Test (DFT) Engineers - ASIC Backend to join us as part of our Boeing Electronic Products…
Added 53 mins ago
Silicon Physical Design Engineer V
Actalent
Menlo Park, CA
We are seeking a Silicon Physical Design Engineer V to join our team and perform power analysis and optimizations in ASIC for AR/VR products. The ideal candidate will have expertise in…
Added 10 hours ago
Systems Security Engineer I – Anti-Tamper / Program Protection (On-site )
RTX Corporation
tucson, AZ
…Supply Chain Risk Management to support Program Protection Implementation on embedded weapons…
Added 13 hours ago
Sr. Staff Design Engineer
Lattice Semiconductor Corp
San Jose, CA
Integrating IPs into FPGA software flows and supporting end-to-end system implementation.
Added 13 hours ago
RTL-to-GDS implementation, Senior Principal Solutions Engineer
Cadence
United States
The primary focus of Senior Principal Solutions Engineer is to support the adoption of Cadence Products to help Chip Designer Customers achieve superior performance for their Design PPA…
Added 14 hours ago
ASIC Design Automation Engineer
Avago Technologies Wireless (U.S.A.) Manufacturing LLC
United States
Broadcom’s ASIC Products Division is seeking a Design Automation Software Development Engineer. They will define, develop, deploy and support the methodology, design automation software…
Added 14 hours ago
ASIC Design Engineer
Avago Technologies U.S. Inc.
United States
Be part of the Custom Silicon Design Team within Broadcom’s ASIC Products Division in beautiful Fort Collins, Colorado. Join a world-class engineering group developing custom CMOS ASICs for…
Added 14 hours ago
IC Design Engineer (STA/ Synthesis)
LSI Corporation
United States
Broadcom is looking for a lead STA/ Synthesis engineer. In this role, you will be contributing to constraint development, constraint validation, synthesis, audits (CDC, RDC, Static…
Added 14 hours ago
Physical Design Engineer
LSI Corporation
United States
Work on Design Implementation activities related to place and route and/ or timing closure – floor-planning, partitioning, placement, clock tree synthesis, route, timing analysis, timing…
Added 14 hours ago
Principal Physical Design Engineer
LSI Corporation
United States
Broadcom’s ASIC Products Division (APD) is looking for a Principal Physical Design Engineer to lead physical design implementation tasks for next-generation high-performance networking,…
Added 14 hours ago
Physical Design Engineer
LSI Corporation
United States
Broadcom’s ASIC Products Division (APD) is looking for a motivated Physical Design Engineer (NCG) to join our Physical Design team. In this role, you will work alongside experienced…
Added 14 hours ago
Physical Design Engineer
LSI Corporation
United States
Broadcom’s ASIC Products Division (APD) is looking for a motivated Physical Design Engineer (NCG) to join our Physical Design team. In this role, you will work alongside experienced…
Added 14 hours ago
Principal Physical Design Engineer, STA
LSI Corporation
United States
Principal Physical Design Engineer, STA - ASIC Products Division (APD)
Added 17 hours ago
Senior Physical Design Engineer
QUANTUM COMPUTING, INC.
Batavia, IL
As a Senior Physical Design Engineer, you will be responsible for the physical implementation of complex ASIC and interposer designs, from floor planning to tapeout. You will work in a…
Added 18 hours ago
Principal Physical Design Engineer
SiTime Corporation
AZ · CA
SiTime is seeking a seasoned Principal Physical Design Engineer to lead the physical implementation and signoff of complex digital blocks and subsystems. The successful candidate will take…
Added 18 hours ago
ASIC Design - Floorplan Engineer
Avago Technologies U.S. Inc.
United States
Be part of the Custom Silicon Design Team within Broadcom’s ASIC Products Division in beautiful Fort Collins, Colorado. Join a world-class engineering group developing custom CMOS ASICs for…
Added 19 hours ago
Senior System Software Engineer, NVLink Fusion
NVIDIA USA
CA · MA
We are looking for a Senior System Software Engineer to develop low-level software for NVIDIA NVLink Fusion, a high-bandwidth, low-latency interconnect platform for next-generation…
Added 19 hours ago
Physical Design/Implementation Engineer-Staff
Qualcomm Incorporated
Austin, TX
Added 20 hours ago
Principal Firmware Engineer – Digital ASIC
Blue Origin Personnel, LLC
Cupertino, CA
You will work closely with ASIC design, verification, hardware, communications systems, test, and manufacturing engineering teams to ensure successful firmware integration and delivery…
Added 20 hours ago
Principal Silicon Test Engineer - TeraWave
Blue Origin Personnel, LLC
San Diego, CA · Cupertino, CA
Blue Origin is seeking a Principal ASIC Test Engineer to lead production test strategy for RF, mmWave, and mixed-signal integrated circuits within Silicon Systems.
Added 23 hours ago
Intern - Design Engineer, HBM
Micron Technology, Inc.
Richardson, TX
As an HBM Design Engineer Intern, you will work alongside experienced memory engineers on the design, development, and validation of advanced HBM products. This role provides hands-on…
Added 23 hours ago
Intern - Design Engineer, HBM
Micron Technology, Inc.
Richardson, TX
As an HBM Design Engineer Intern, you will work alongside experienced memory engineers on the design, development, and validation of advanced HBM products. This role provides hands-on…
Added 1 day ago
Principal/Sr. Principal Engineer Systems
Northrop Grumman
Roy, UT
The Mission Defense Team (MDT) is seeking a highly motivated and qualified system engineer to serve as a Hardware Assurance Engineer. This is a dual level (Principal/Sr Principal Systems…
Added 1 day ago
Senior ASIC Design Verification Engineer - Slingshot
Hewlett Packard Enterprise
Chippewa Falls, WI · Ft. Collins, CO · Bloomington, MN
…((HPE Slingshot interconnect). As a Senior Design Verification Engineer, you will work alongside experienced architects, logic designers, and verification engineers on the switch and NIC…

QUANTUM COMPUTING, INC.

Senior Physical Design Engineer

Batavia, IL, United States

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Job details

Experience: 5+ years of experience in physical design, specifically in ASIC, SoC, or advanced
Posting language: English
Posted: Oct 30, 2026

Original job description

Job Title: Senior Physical Design Enginee

Location: Batavia, IL Division: NHanced

About Us:

Quantum Computing Inc. (QCi) (Nasdaq: QUBT) is an innovative, integrated photonics company that provides accessible and affordable quantum machines to the world today. QCi products are designed to operate at room temperature and low power at an affordable cost. The Company’s portfolio of core technology and products offer unique capabilities in the areas of high-performance computing, artificial intelligence, cyber security as well as remote sensing applications.

Scope of the Job:

As a Senior Physical Design Engineer, you will be responsible for the physical implementation of complex ASIC and interposer designs, from floor planning to tapeout. You will work in a highly collaborative environment, leveraging Cadence design tools and Git for version control, ensuring efficient and high-quality execution. The ideal candidate is a self-starter who thrives with minimal supervision and has a strong background in advanced node physical design methodologies.

Duties / Responsibilities:

Drive full-chip physical implementation of 2.5D interposer and ASIC designs, including floor planning, placement, clock tree synthesis (CTS), routing, and optimization.
Ensure design compliance with timing, power, and area (PPA) requirements, as well as DFM, DRC, and LVS constraints.
Utilize Cadence tools (Innovus, Virtuoso, Tempus, Voltus, Pegasus, etc.) for physical design, verification, and signoff.
Develop and execute timing closure strategies, working with STA engineers to meet performance goals.
Optimize power distribution networks (PDN) and electromigration (EM) reliability in multi die packaging environments.
Work with package and system engineers to optimize die-to-die interconnect, bump placement, and TSV integration.
Collaborate with RTL designers, DFT engineers, and backend teams to ensure seamless integration.
Implement ECOs (Engineering Change Orders) and efficiently iterate design revisions.
Utilize Git-based version control workflows for design database management and collaborative development.
Identify and resolve congestion, signal integrity (SI), and crosstalk issues in complex designs.
Ensure successful tapeout by running full-chip physical verification and working with foundry partners.

Required Skills & Experience:

5+ years of experience in physical design, specifically in ASIC, SoC, or advanced

packaging (2.5D, 3DIC) technologies.

Hands-on experience with Git-based version control systems for managing design

revisions.

Experience with timing closure and signal integrity.

Additional Preferred Skills:

Experience in 2.5D/3DIC packaging and heterogeneous integration.
Hands-on experience with chip-package co-design methodologies.

Quantum Computing Inc. (QCi) is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status, or any other characteristic protected by applicable federal, state, or local law. Incumbent(s) in this position may be required to perform other duties and special assignments not specifically stated above. Statements outlined in this section are designated as essential job functions in accordance with the Americans with Disabilities Act of 1990.

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Skills

Regulatory compliance
Packaging
RTL
DFT
Git
Control systems

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