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Added 3 hours ago
EDA Tools & Design Automation Engineer
Tenstorrent
Santa Clara, CA
Tenstorrent is seeking an EDA Tools & Design Automation Engineer to join the Mixed Signal Design Automation team. In this role, you will own the deployment, configuration, reliability, and…
Added 1 day ago
AI enabled PDK Development Engineer
GLOBALFOUNDRIES U.S. INC.
NY
GlobalFoundries is seeking an AI-Enabled PDK Development Engineer with strong artificial intelligence and software-engineering skills to develop, implement, test, and support AI-guided…
Added 1 day ago
AI enabled Device Modeling Engineer
GLOBALFOUNDRIES U.S. INC.
NY
…device-modeling challenges within a cross-functional technology-development environment. The engineer will work with device physicists, compact-modeling experts, characterization engineers,…
Added 1 day ago
AI Enabled Device Modeling
GLOBALFOUNDRIES U.S. INC.
NY
GlobalFoundries is seeking a new graduate with strong artificial intelligence and machine-learning skills to develop AI-enabled methods for semiconductor device modeling. The engineer will…
Added 13 days ago
M
Senior Physical Verification CAD Engineer
Microsoft
CA · OR · NC · Mountain View, CA · Hillsboro, OR · Raleigh, NC · Mountain View · Hillsboro · Raleigh
- $119,800 to $261,000 USD / year
Development and deployment of AI-enabled agents to automate and optimize Physical Verification (PV) and PERC workflows across the Silicon organization.
Added 16 days ago
Principal Foundry Interface Design Engineer, HBM
Micron Technology
Folsom · Richardson
In this full‑time onsite role, you will provide critical technology support for the design and development of advanced HBM DRAM products. You will serve as a bridge between internal design…
Added 16 days ago
Staff CAD Design Automation Engineer
Micron Technology
Boise
As a CAD Engineer, you will play a critical role in keeping our AI enabled design ecosystem running efficiently and reliably. You’ll develop, improve, and support both in-house and…
Added 16 days ago
Principal Foundry Interface Design Engineer, HBM
Micron Technology
Folsom · Richardson
In this full‑time onsite role, you will provide critical technology support for the design and development of advanced HBM DRAM products. You will serve as a bridge between internal design…
Added 17 days ago
Q
Principal Electrical Engineer - Layout/EDA tool Automation - 968
Quantinuum
US Brooklyn Park, MN
- $180,000 to $205,000 USD / year
We are seeking a Principal Engineer, Layout Automation & AI in our Brooklyn Park, MN location. You will accelerate the transformation of our design and layout development processes through…
Added 19 days ago
Senior Backend Design Automation Engineer - New Process Node Enablement
Altera Corporation
San Jose, CA
…inherited infrastructure with solutions we own end to end. A senior engineer joining now will have the opportunity to shape how the next several process nodes are…
Added 19 days ago
Sr. PDK Engineer (Starlink/Akoustis)
SpaceX
Bastrop, TX
Join the Starlink/Akoustis Filter Design Team as a Senior PDK Software Engineer. In this role you lead development of next-generation Process Design Kits (PDKs), drive software innovation…
Added 19 days ago
Principal Foundry Interface Design Engineer, HBM
Micron Technology, Inc.
Folsom, CA · Richardson, TX
In this full‑time onsite role, you will provide critical technology support for the design and development of advanced HBM DRAM products. You will serve as a bridge between internal design…
Added 19 days ago
Principal Foundry Interface Design Engineer, HBM
Micron Technology, Inc.
Folsom, CA · Richardson, TX
In this full‑time onsite role, you will provide critical technology support for the design and development of advanced HBM DRAM products. You will serve as a bridge between internal design…
Added 19 days ago
Staff CAD Design Automation Engineer
Micron Technology, Inc.
Boise, ID
As a CAD Engineer, you will play a critical role in keeping our AI enabled design ecosystem running efficiently and reliably. You’ll develop, improve, and support both in-house and…

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Microsoft

Senior Physical Verification CAD Engineer

CA, United States
OR, United States
NC, United States
Mountain View, CA, United States
Hillsboro, OR, United States
Raleigh, NC, United States
Mountain View, United States
Hillsboro, United States
Raleigh, United States

$119,800 to $261,000 USD / year

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Job details

Pay: $119,800 to $261,000 USD / year
Apply by: Apr 13, 2027
Posting language: English
Posted: Oct 15, 2026

Original job description

Overview

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for engineers to help achieve that mission.

Do you have a passion for advanced silicon signoff and physical verification at leading‑edge technology nodes? You will be part of a team responsible for driving state‑of‑the‑art Physical Verification CAD solutions for Microsoft’s silicon design teams. In this role, you will foster the enablement and support of advanced‑node DRC, LVS, Antenna, and ESD signoff flows, working closely with EDA vendors, and internal design teams. You will own PV signoff methodology end to end, identify gaps, and drive scalable, production‑ready solutions across multiple silicon programs. We are committed to a diverse and inclusive workspace and strongly encourage applicants from all backgrounds and walks of life. Difference makes us better.

We are looking for a Senior Physical Verification CAD Engineer to join our team.

Responsibilities

Develop, maintain, and support Physical Verification (PV) flows across all Silicon projects, spanning early design (shift‑left) through final signoff, including DRC, LVS, ERC, antenna, and advanced checks
Work on PV‑related flow and design issues, including tool stability, runtime scalability, deck integration, waiver correctness, and cross‑tool debug.
Participate in cross functional alignment with CAD, Technology, and external EDA partners to communicate PV requirements, influence roadmap priorities, and unblock execution at critical project milestones.
Support PDK and node enablement activities, ensuring PV flows are validated, production ready, and aligned with foundry decks and internal signoff criteria across multiple technology variants.
Contribute to PV activities, including training material, documentation, onboarding labs, and continuous improvement of automation and debug infrastructure.
Development and deployment of AI-enabled agents to automate and optimize Physical Verification (PV) and PERC workflows across the Silicon organization.

Qualifications

Minimum Qualifications:

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience
OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience
OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience
OR equivalent experience.

Other Requirements:

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to, the following specialized security screenings:

Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter.
Citizenship & Citizenship Verification: This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Preferred Qualifications:

BS + 7 years / MS + 5 years of relevant experience in Physical Verification, Physical Design, or CAD methodology roles.
Strong hands-on experience with Physical Verification checks, including: Base and Metal DRC, LVS, ERC, Antenna, etc.
Proficiency with industry standard PV tools, such as Calibre.
Solid scripting skills in at least one language (TCL, Python, Perl, or equivalent) for flow automation, debug, and data analysis.
Ability to debug complex, cross domain issues, reason about root cause (design vs flow vs tool), and drive issues to closure across teams.
SVRF rule or deck enablement experience, including customization, and debug support.
Experience with advanced verification checks, such as: PERC (including custom or CNOD based checks), ESD, EOS, level shifter, and reliability focused verification.
Exposure to shift left PV methodologies, TCIC flows, and early-stage verification strategies that improve convergence and reduce late-stage surprises.
Prior experience contributing to or leading PV, methodology councils, or multi project enablement efforts.

#SCHIE #azurehwjobs

Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay

This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

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Skills

Bing
Microsoft 365
Microsoft Teams
Microsoft Azure
EDA
Documentation
Process improvement
Electrical engineering
Computer engineering
Computer science
Python
Perl
Data analysis

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