Jobs in the United States

25+ jobs

Added 16 mins ago
Senior RF Engineer
Anduril Industries
Broomfield, CO · Fort Collins, CO
…allies. The Radar team is seeking an experienced Senior RF Engineer to help us design, test, and deploy the next generation of US radars. The Radar team is responsible for all aspects of…
Added 16 mins ago
RF Engineer
Anduril Industries
Broomfield, CO · Fort Collins, CO
…and its allies. The Radar team is seeking an experienced RF Engineer to help us design, test, and deploy the next generation of US radars. The Radar team is responsible for all aspects of…
Added 2 hours ago
M
Principal Test Engineer
Microsoft
OR · TX · WA · CA · Hillsboro, OR · Austin, TX · Redmond, WA · Mountain View, CA · Hillsboro · Austin · Redmond · Mountain View
- $142,800 to $304,200 USD / year
We are looking for a Principal Test Engineer to join the team.
Added 3 hours ago
Design-for-Test (DFT) Engineer - ASIC Backend – (Associate, Experienced, or Lead)
The Boeing Company
El Segundo, CA
If you are a creative, autonomous engineer passionate about advancing DFT for mission-critical ASICs, we want to hear from you. Please include a cover letter/brief summary of relevant DFT…
Added 3 hours ago
Electrical Test Engineer (Electrical Characterization)
Capgemini
Irvine, CA
Develop and present Design for Testability (DFT) reports for ECU designs
Added 3 hours ago
Staff Manufacturing Electrical Engineer
J&J Family of Companies
San Jose, CA
Johnson & Johnson's MedTech Surgery team at MONARCH is recruiting for a Staff Manufacturing Electrical Engineer within our Robotics & Digital Solutions (RAD) organization. This role is…
Added 8 hours ago
Senior Advanced Manufacturing Engineer – Test
Haier US Appliance Solutions, Inc.
Louisville, KY
Join our Advanced Manufacturing Engineering (AME) Industry 4.0 team as a Senior Advanced Manufacturing Engineer – Test, where you will support the design, implementation, and improvement of…
Added 11 hours ago
Senior ASIC Engineer - Post Silicon Validation
Cisco Systems, Inc.
San Jose, CA
In this role as a Post-Silicon Validation Engineer, you will be responsible for:
Added 13 hours ago
I
Senior Static Timing Analysis (STA) Engineer
Intel
Phoenix, AZ
- $164,470 to $269,100 USD / year
Intel is seeking an experienced Senior Static Timing Analysis (STA) Engineer to help drive the development of next-generation semiconductor products. In this role, you will play a critical…
Added 15 hours ago
B
ASIC Technical Lead Engineer
BioTalent
San Diego, CA
- $220,000 USD / year
They need an experienced ASIC engineer to serve as the technical owner of a custom neural recording chip. A specialist IC design firm handles the design execution. This person is the…
Added 17 hours ago
Physical Design Engineer
LSI Corporation
United States
Physical Design Engineer (New College Grad) - ASIC Products Division (APD)
Added 17 hours ago
Physical Design Engineer
LSI Corporation
United States
Physical Design Engineer (New College Grad) - ASIC Products Division (APD)
Added 17 hours ago
Principal Physical Design Engineer, STA
LSI Corporation
United States
Principal Physical Design Engineer, STA - ASIC Products Division (APD)
Added 18 hours ago
Senior Electrical Engineer
ALTEN Technology USA
Boulder, CO · Westminster, CO
As a Senior Electrical Engineer you will be responsible for;
Added 18 hours ago
Senior HBM Architecture & Circuit Design Engineer
Micron Technology, Inc.
Richardson, TX · Boise, ID
HBM Core-Die Architecture & Circuit Design Engineer
Added 18 hours ago
Senior HBM Architecture & Circuit Design Engineer
Micron Technology, Inc.
Richardson, TX · Boise, ID
HBM Core-Die Architecture & Circuit Design Engineer
Added 18 hours ago
Sr. Manufacturing Engineer
OptiTrack
Corvallis, OR
OptiTrack seeks a hands-on Senior Manufacturing Engineer to develop, automate, optimize, and scale manufacturing for motion capture, tracking, vision, and sensing products. Working across…
Added 18 hours ago
Launch Ops Manufacturing Engineer III
Blue Origin Personnel, LLC
Space Coast, FL
Contribute to design for manufacturability (DFM), design for assembly (DFA), design for test (DFT), key to building reliable vehicles for space exploration.
Added 18 hours ago
Sr. Photonics Engineer
Blue Origin Personnel, LLC
Reston, VA · Denver, CO
As a Senior Photonics Engineer, you lead optical architecture for Optical Inter-Satellite Link (OISL) terminals supporting a classified beyond LEO mission.
Added 19 hours ago
Principal Silicon Product Engineer
Google
Sunnyvale, CA
As the Principal Silicon Product Engineer, you will serve as the chief technical authority for the Silicon Sourcing organization bridging hardware engineering design, global manufacturing…
Added 19 hours ago
RF Engineer
Anduril Industries
Broomfield, CO · Fort Collins, CO
…and its allies. The Radar team is seeking an experienced RF Engineer to help us design, test, and deploy the next generation of US radars. The Radar team is responsible for all aspects of…
Added 20 hours ago
Senior Physical Design Engineer
QUANTUM COMPUTING, INC.
Batavia, IL
As a Senior Physical Design Engineer, you will be responsible for the physical implementation of complex ASIC and interposer designs, from floor planning to tapeout. You will work in a…
Added 21 hours ago
Electrical Engineer – Embedded Circuit Design Engineer
CFD Research Corporation
Hollywood, AL
We are seeking a highly capable Electrical Engineer with strong expertise in embedded hardware design, microcontroller based circuit development, high speed and low speed communication…
Added 21 hours ago
Principal Analog Mixed-Signal Design Engineer
SiTime Corporation
CA
Work with cross-functional team to architect the chip for DFT
Added 21 hours ago
A
ASIC Verification Engineer
Amentum
Crane, IN
- $85,000 to $100,000 USD / year
Amentum is seeking a Computer Engineer to support verification of ASICs and/or FPGAs for high-reliability and security-focused systems for our Department of War customers. The engineer will…

Principal Test Engineer

Microsoft · OR, United States · TX, United States · WA, United States · CA, United States · Hillsboro, OR, United States · Austin, TX, United States · Redmond, WA, United States · Mountain View, CA, United States · Hillsboro, United States · Austin, United States · Redmond, United States · Mountain View, United States · $142,800 to $304,200 USD / year

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Microsoft

Principal Test Engineer

OR, United States
TX, United States
WA, United States
CA, United States
Hillsboro, OR, United States
Austin, TX, United States
Redmond, WA, United States
Mountain View, CA, United States
Hillsboro, United States
Austin, United States
Redmond, United States
Mountain View, United States

$142,800 to $304,200 USD / year

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Job details

Pay: $142,800 to $304,200 USD / year
Apply by: Apr 28, 2027
Posting language: English
Posted: Oct 30, 2026

Original job description

Overview

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Silicon Manufacturing and Product Engineering team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a Principal Test Engineer to join the team.

#SCHIE #CSME

Responsibilities

The candidate for this position will be expected and able to complete the following responsibilities:

Responsible for product and engineering activities supporting new product development and manufacturing, with primary focus on scan (structural) test.
Contribute to silicon bring-up, validation, and manufacturing readiness while working closely with cross-functional partners.
Support semiconductor IC development across fabrication, manufacturing test, and packaging phases.
Contribute to ATE test program development, including scan pattern integration, test method implementation, bring-up, silicon characterization, debug, and yield analysis for logic defects.
Execute defined test plans and methodologies while identifying issues and escalating risks with clear technical data.
Apply working knowledge of Design-for-Test (DFT), including scan architecture, ATPG, fault models, silicon fabrication processes, product qualification and reliability, and basic transistor theory.
Collaborate with design, DFT, product, and manufacturing teams to support scan test readiness, coverage closure, and issue resolution.
Gain exposure to product domains such as high-performance computing, AI, GPUs, and telecom, as applicable to assigned projects.
Apply industry-standard DFT features, including scan (SAF/TDF), JTAG, boundary scan, and at-speed testing.
Support scan test content generation, including ATPG pattern validation, pattern bring-up, and post-silicon debug activities.
Understand scan fault models (e.g., stuck-at and transition faults), coverage targets, and defect screening methodologies.
Utilize scan diagnosis tools to perform failure analysis, identify defect locations, and support yield improvement activities.
Work with DFT teams to support simulation, emulation, and pattern verification for scan test validation.

Qualifications

Required Qualifications:

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.

Screening Requirements

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Preferred Qualifications:

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience OR equivalent experience. 1+ year(s) experience working on or leading projects from beginning-to-end.
5+ years of experience in integrated circuit development, including pre-silicon, first silicon bring-up, or new product introduction.
5+ years of experience in product and test engineering, with hands-on exposure to ATE test program development, bring-up, and debug for scan.
Experience working on complex SoCs or chips, including exposure to high-performance, AI, or advanced-node designs.
Clear written and verbal communication skills with the ability to present technical data effectively.
Experience collaborating with cross-functional teams in a structured development environment.
Working knowledge of probability, statistics, and basic DOE concepts.
Familiarity with DFT and DFM techniques, with emphasis on scan/structural test methodologies.
Experience with scan/ATPG methodologies, including pattern generation, validation, and test flows.
Understanding silicon bring-up, debug, and characterization on ATE platforms (e.g., Advantest 93K) for scan test content.
Exposure to mixed-signal IP test development and its interaction with structural test is a plus.
Basic device physics background.
Demonstrated adaptability, curiosity, and constructive problem-solving approach.
Strong Growth Mindset with a desire to learn and expand technical depth.
Fundamentals of computer architecture.
Good unit and integration testing skills.
Proficiency with Linux-based environments.
Experience debugging and optimizing test programs, ATPG patterns, or validation flows.
Customer-focused mindset with attention to quality, coverage, and execution.
Demonstrated ability to deliver results on assigned tasks with guidance.
Sound technical judgment in scoping and resolving well-defined problems.

Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay

This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

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