Archived listing. The details below describe a past opening.
Req ID:
JR108840 MTS Package engineer - ASIC package design, logic integration and design rules
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
We are the team defining the future of packaging of complex memory systems! Our Package pathfinding and Architecture organization sits at the intersection of silicon, packaging, systems, and customer needs - turning complex scaling challenges into technologies that power next generation platforms, through cutting edge packaging technologies. If you enjoy working on problems with real industry impact, look no further!
Key Responsibilities
- Partner with System Architects and engineering teams to define package architecture, connectivity, and electrical requirements.
- Develop block diagrams, schematics, and logical connectivity for system-in-package designs.
- Create and verify package netlists using schematic and automation-based design flows.
- Support ASIC/package co-design, including pad/bump maps, connectivity, and package integration.
- Evaluate package designs for electrical performance, manufacturability, reliability, and system requirements.
- Collaborate with Package Design and SI/PI teams to support physical and electrical implementation.
- Support integration of memory, ASICs/controllers, and other devices within complex package architectures.
- Support new and evolving interfaces such as LPDDR/DDR, ONFI, UFS, PCIe, and other high-speed protocols.
- Lead technical reviews and resolve package connectivity and integration issues through design, validation, and product bring-up.
- Develop technical documentation and provide technical guidance and mentoring to engineering teams.
- Work with TPM and factory teams to develop design rules roadmap for packaging across all memory and ASIC roadmaps
- Support improvements in package integration, design methodology, verification, and automation.
- Support new protocol enablement (SCA-Separate Command Address, ONFI, UFS, PCIe) and capability bring-up.
- Support debugging of root cause and failures in reliability tests by electric failure analysis (EFA) and Physical Failure Analysis (PFA) and strive for resolution and improvements through multi-functional team partnership.
- Helps
Qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Mechanical engineering or a related field with 10+ years of experience,
- Proven experience in hardware design and development, including block diagrams, schematics, and electrical requirements.
- Strong understanding of system architecture and the ability to work collaboratively with System Level Architects.
- Familiarity with NAND flash memory technology, controller design, and storage system behavior.
- Proficiency in EDA schematic and simulation tools such as Cadence Allegro System Capture, Synopsys Design Compiler, Mentor Graphics PADS, Altium Designer, and OrCAD.
- Experience with ASIC architecture in storage products (e.g., SSD, eMMC, UFS, USB) and high-speed serial and parallel interfaces (e.g., PCIe, MIPI, DDR, LPDDR, ONFI).
Preferred Skills
- Experience in semiconductor package design, architecture, or integration.
- Experience with schematics, netlists, connectivity definition, and verification.
- Understanding of ASIC/package and System-in-Package integration.
- Knowledge of signal integrity, power integrity, and package electrical design.
- Familiarity with memory and high-speed interfaces such as DDR/LPDDR, ONFI, UFS, and PCIe.
- Experience with EDA tools for schematic capture, package design, or connectivity verification.
- Familiarity with advanced packaging, substrate technologies, and assembly processes.
- Strong cross-functional technical leadership and problem-solving skills.
- Experience and/or interest in developing Agentic AI workflows into current or future processes.
Job Profile(s):
Product Development Engineer 5 - Hardware Engineering MTS
Relocation Level: TBD
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The US base salary range that Micron Technology estimates it could pay for this full-time position is:
$143,000.00 - $398,000.00 a year
Additional compensation may include benefits, bonuses and equity. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.
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