Jobs in the United States

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Added 5 mins ago
National Manager, Software Engineer
Toyota
Plano, TX
…within the domain. Own and drive key initiatives across our full software stack - from customer-facing features to backend…
Added 10 mins ago
AI Engineer
Entravision
CA
We are seeking an AI / Applications Engineer to build the agents and applications that put our data to work. You will design, build, and evaluate AI agents that automate real operational…
Added 15 mins ago
Senior Kubernetes Engineer
Peraton
Remote, United States
Peraton is seeking an experienced Senior Kubernetes Engineer to support development, modernization, and migration of containerized and agentic workloads in a government multi-cloud…
Added 15 mins ago
Senior Machine Learning Engineer, Relevance
Airbnb
United States
Added 18 mins ago
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Technical Support Engineer (Dedrone)
TEKsystems
Mesa, AZ
- $27 to $29 USD / hour
…across North America, Europe and Asia. As an industry leader in Full-Stack Technology Services, Talent Services, and real-world application, we work with progressive leaders to drive…
Added 18 mins ago
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DevOps Engineer
TEKsystems
Madison, WI
- $140,000 to $170,000 USD / year
…across North America, Europe and Asia. As an industry leader in Full-Stack Technology Services, Talent Services, and real-world application, we work with progressive leaders to drive…
Added 18 mins ago
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Linux Infrastructure Engineer
TEKsystems
Irving, TX
- $60 to $75 USD / hour
…(Relevant years of experience will suffice as well)2. Juniper Engineer level certification in both Routing and Switching (JNCIP) and Network Security (JNCIP-SEC). (Again this is desired,…
Added 23 mins ago
Staff Full-stack Engineer - Shopping (Remote-eligible)
Capital One
Montpelier, VT
Remote (Regardless of Location): $244,700 - $279,200 for Staff Full-stack Engineer
Added 26 mins ago
TT
Founding Senior Engineer
True Talent Solutions Partners
New York, NY
- $175,000 to $225,000 USD / year
- Own full-stack development of the growth engine, with a strong focus on backend systems and infrastructure.
Added 37 mins ago
Senior Software Engineer, IT Digital Employee Experience
Databricks
San Francisco, CA
Design, build, and maintain production full-stack applications (web and mobile) used company-wide. Such as, but not limited to, procurement platforms, employee experience apps, SaaS…
Added 40 mins ago
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Cloud - Bare Metal Infrastructure Engineer
Render
Remote, United States
- $230,000 to $290,000 USD / year
At Render, we’re building the modern cloud platform for developers creating AI-native, full-stack, multi-service applications. Our mission is to eliminate the tradeoff between the power of…
Added 41 mins ago
Staff Engineer
Pager Health
Remote, United States
Infrastructure Management: Lead the full stack product engineering team to own the development and maintenance of the infrastructure required to support software applications, including…
Added 48 mins ago
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Infrastructure engineer
WRITER
New York City, NY · Seattle, WA · San Francisco, CA
- $173,000 to $240,000 USD / year
…available, performant, and reliable, 24/7. As an Infrastructure engineer, you'll be at the heart of making this a reality, impacting every enterprise customer who trusts us with their…
Added 48 mins ago
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Staff security engineer, application security
WRITER
New York City, NY · Seattle, WA · San Francisco, CA
- $204,000 to $240,000 USD / year
This is where security meets innovation at enterprise scale. As a staff security engineer, applications at WRITER, you'll be building the security foundations that protect the AI systems…
Added 52 mins ago
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Linux Messaging Engineer
TEKsystems
Irving, TX
- $60 to $65 USD / hour
…across North America, Europe and Asia. As an industry leader in Full-Stack Technology Services, Talent Services, and real-world application, we work with progressive leaders to drive…
Added 52 mins ago
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IT Support Analyst
TEKsystems
Lansing, MI
- $25 to $30 USD / hour
…across North America, Europe and Asia. As an industry leader in Full-Stack Technology Services, Talent Services, and real-world application, we work with progressive leaders to drive…
Added 52 mins ago
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Linux Messaging Engineer
TEKsystems
Charlotte, NC
- $60 to $65 USD / hour
…across North America, Europe and Asia. As an industry leader in Full-Stack Technology Services, Talent Services, and real-world application, we work with progressive leaders to drive…
Added 52 mins ago
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Ai Engineer
TEKsystems
Palo Alto, CA
- $80 to $85 USD / hour
DescriptionSenior AI Engineer / Forward Deployed EngineerAbout the OpportunityJoin a newly formed, executive-sponsored AI Transformation organization focused on delivering enterprise-scale…
Added 52 mins ago
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Infrastructure Engineer
TEKsystems
Foster City, CA
- $50 to $60 USD / hour
…across North America, Europe and Asia. As an industry leader in Full-Stack Technology Services, Talent Services, and real-world application, we work with progressive leaders to drive…
Added 59 mins ago
TT
Founding Engineer
True Talent Solutions Partners
New York, NY
- $210,000 to $260,000 USD / year
- Three to eight years of experience as a backend or full-stack engineer, with strong backend, architecture, and database schema skills.
Added 1 hour ago
GTM Engineer - CX
Clay Labs
New York, NY
AI is unleashing the biggest wave of company creation in history. Clay's mission is to be the engine those companies use to grow to their full potential.
Added 1 hour ago
Fixed Income Algo Developer, Vice President
Citibank, N.A.
United States
…unique and challenging opportunity for an experienced software engineer to contribute to one of the industry's largest and most sophisticated algorithmic trading platforms. You will be…
Added 1 hour ago
BA
Full Stack Modeling and Simulation Software Engineer
Booz Allen Hamilton
Colorado Springs, CO
- $69,300 to $158,000 USD / year
As a full stack developer, you can resolve complex challenges by delivering complete, end-to-end software solutions in a fast-paced, agile environment. If you're looking for an opportunity…
Added 1 hour ago
Full Stack Software Engineer (2 days telework/week, TS/SCI with Polygraph required)
Red Alpha
Annapolis Junction, MD
We're seeking an experienced Full Stack Software Engineer to support a Customer Service Request Portal (CSRP). In this role, you will collaborate with a team to develop and maintain backend…
Added 1 hour ago
Engineer 3, UX/UI
BlueForge Alliance
Remote, United States
The Full Stack (UI/UX) Engineer 3 will have strong foundational software engineering capabilities with a focus in front-end software development. This position will lead BlueForge…

Closed listing

SoC Physical Design Engineer

Austin, TX, United States

This opening has closed.

The original listing is kept below for reference.

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Job details

Experience: 8+ years of experience in SoC or ASIC physical design
Posting language: English
Posted: Nov 3, 2026

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Original job description

Archived listing. The details below describe a past opening.

Summary:

Meta’s mission is to give people the power to build community and bring the world closer together. Our global teams are constantly iterating, solving problems, and working together to empower people around the world to build community and connect in meaningful ways. Together, we can help people build stronger communities. We are just getting started.Reality Labs focuses on delivering Meta’s vision through creating advanced AI enabled wearables. The compute performance and power efficiency requirements of wearables require custom silicon. Reality Labs Silicon team is driving the state-of-the-art forward with breakthrough work in AI, augmented reality, computer vision, machine learning, graphics, displays, and sensors. Our chips will enable wearable devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms. As a Physical Design Engineer, you will collaborate closely with System-on-Chip (SoC) architects, front-end and back-end hardware designers, and power/performance teams to drive the physical implementation of IP, subsystems, and the chip top-level in advanced technology nodes. You will be responsible for developing custom methodologies across the physical design cycle – including floorplanning, physical synthesis, placement, clock-tree synthesis, routing, and static timing analysis – to optimize the power, performance, and area of the design while ensuring overall convergence. You will have the opportunity to bring cutting-edge technologies into a high-volume consumer product.

Required Skills:

SoC Physical Design Engineer Responsibilities:

Lead physical implementation, from floorplanning through tapeout, including physically-aware, ultra-low-power logic synthesis, place-and-route, static timing analysis, and EM/IR, at all levels of the SoC hierarchy
Define physical design methodology and flows to realize power and timing intent, and in doing so, meet milliwatt-level always-on power budgets in a wearable form factor, where thermal limits demand perf/mW compute efficiency
Identify and resolve physical implementation bottlenecks related to congestion, timing, and power
then develop automation and AI-assisted flows to improve throughput and QoR
Collaborate with RTL designers to provide implementation feedback that shapes the microarchitecture towards power- and area-efficient timing closure
Work closely with package engineers to ensure the floorplan, clock tree, and power plan meet the product-level power delivery, signal integrity, thermal, and routability requirements
Partner with design verification and DFx teams to ensure physical implementation supports gate-level functional correctness and meets debug and testability requirements
Drive EDA vendor engagement, tool evaluations, and flow improvements

Minimum Qualifications:

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
Bachelor’s degree in Electrical Engineering, Computer Engineering, relevant technical field, or equivalent practical experience
8+ years of experience in SoC or ASIC physical design
Hands-on RTL-to-GDSII experience in 3nm or below, including floorplanning, physical synthesis, placement, clock tree synthesis, routing, static timing analysis, and signoff
Experience with low-power implementation techniques, including power gating, voltage areas/islands, UPF, and DVFS
Experience with static timing analysis, including defining timing constraints, exceptions, and PVT corners/modes for functional and DFT signoff, and accounting for OCV/POCV and crosstalk effects
Experience working with EDA tools such as Fusion Compiler/Genus, ICC2/Innovus, PrimeTime/Tempus, RedHawk/Voltus, or equivalent
Proficiency in scripting (TCL, Python, or Perl) and reading Verilog netlists/RTL
Experience collaborating across RTL, DV, DFx, package, and vendor teams

Preferred Qualifications:

Ownership of block-level and/or full-chip power grid planning: dedicated macro supplies, power-switch chaining, MiM/decoupling caps, and EM/IR closure
Track record of defining signoff criteria and leading tapeout execution
Tapeout experience at 3nm or below
Experience adhering to and implementing responsible, ethical AI practices (e.g. risk assessment, bias mitigation, quality and accuracy reviews)
Experience applying ML-driven implementation (e.g. DSO.ai/Cerebrus) or LLM agents to flow debugging/QoR with measurable impact
Demonstrated ongoing AI skill development (e.g. prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
Background in physically-aware synthesis of ultra-low-power designs, including custom recipes and app options, low-voltage PPA exploration, and UPF authoring
Management of the die area budget, including full-chip partitioning, beachfront allocations, channel planning, and pipeline/feedthrough insertion
Facility with advanced clock-tree synthesis, such as multi-source / H-tree, at block- and/or chip-level, including clock power reduction and hierarchical techniques
Experience leading chip-level timing closure across multi-corner/multi-mode scenarios, authoring I/O timing constraints, parsing flat timing reports, and implementing timing ECOs
Experience with 3D-IC structures (e.g., TSVs), EDA tools, and signoff methodologies
Master’s or PhD degree in Electrical Engineering, Computer Engineering, or equivalent area

Public Compensation:

$178,000/year to $250,000/year + bonus + equity + benefits

Industry: Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.

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Skills

Place-and-route
RTL
EDA
Computer science
Computer engineering
Electrical engineering
DFT
Python
Perl
Verilog
Hazard assessment
ML
Debugging

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