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Added 56 mins ago
I
System Solutions Engineer
InterImage
Remote, United States
- $170,000 to $230,000 USD / year
We are seeking a Technical Product Owner / Solutions Engineer to bridge the gap between customers, engineering teams, and mission stakeholders in the design and delivery of modern…
Added 56 mins ago
Software Engineer
InterImage
Remote, United States
We are seeking a motivated and innovative Software Engineer to support the development of next-generation AI-enabled solutions for mission-driven environments across the Department of…
Added 56 mins ago
Application Development Technical Lead
InterImage
Huntsville
As an Application Development Engineer, you will help shape how mission software is designed, delivered, and supported across a varied application portfolio. This role is central to…
Added 1 hour ago
SoC Silicon Top-Level Floorplan Engineer
Google
Sunnyvale, CA
Added 1 hour ago
ASIC Design Verification Engineer, Machine Learning
Google
Sunnyvale, CA
As an ASIC Design Verification Engineer, you will be part of a team developing ASICs used to accelerate computation in data centers. You will have dynamic, multi-faceted responsibilities in…
Added 1 hour ago
Customer Success Engineer - Americas
JetBrains
Remote, United States
Added 1 hour ago
Sr Data Engineer
Insight Global
Kansas City, KS
Insight Global is looking for a Senior Data Engineer to join a Web Services team that is expanding its focus on AI-enabled application development. This person will take ownership of the…
Added 1 hour ago
Agentic Context Engineer
Jobgether
Remote, United States
This position is listed on behalf of a partner company, who manages all applications and next steps. Our partner is looking for an Agentic Context Engineer based in the United States.
Added 1 hour ago
AI Systems & Solutions Engineer
BWXT
Oak Ridge, TN
As an AI Systems & Solutions Engineer, you will support enterprise-level digital engineering, manufacturing modernization, and operations analytics initiatives across the Oak Ridge…
Added 2 hours ago
Senior Software Engineer, AI/ML Infrastructure, Ads Safety
Google
Pittsburgh, PA
…mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as…
Added 2 hours ago
Lead, Software Engineer - Backend /Integration - TS/SCI
L3Harris Technologies
Patrick Air Force Base, FL
Job Title: Lead, Software Engineer - Backend/Integration
Added 2 hours ago
Software Engineering Manager, High Performance Networking
Google
Sunnyvale, CA
Like Google's own ambitions, the work of a Software Engineer goes beyond just Search. Software Engineering Managers have not only the technical expertise to take on and provide technical…
Added 2 hours ago
Software Engineer, Research Tooling
SpaceXAI
Palo Alto, CA
As a Software Engineer on the Research Tools team, you'll build the infrastructure and applications that enable our researchers to iterate quickly, run complex experiments, and extract…
Added 2 hours ago
Devops Platform Engineer
Advanced Micro Devices, Inc
San Jose, CA
We are seeking a hands-on Platform Engineer to build and operate the infrastructure foundations that enable engineering teams to deliver reliable, scalable, and secure products. This role…
Added 2 hours ago
Software Engineer, Bugbot
SpaceXAI
New York, NY · San Francisco, CA
We're hiring a Software Engineer to work on Bugbot. Bugbot reviews pull requests, catches bugs, suggests improvements, and is becoming a critical part of how engineering teams ship…
Added 2 hours ago
Engineering Manager, Agent & Product Security
SpaceXAI
New York, NY · Palo Alto, CA
- Engineer the isolation that makes Cursor safe to run inside customers' most valuable codebases: tenancy, workspace, secret, and data protections designed for real adversaries
Added 2 hours ago
ASIC Design Engineer, Cloud TPU
Google
Sunnyvale, CA
As an RTL Design Engineer on the TPU team, you will be a key contributor to the development of Google's AI accelerators. You will leverage your expertise in digital logic design, computer…
Added 2 hours ago
Staff Software Engineer, AI/ML, Cloud IAM, Dataset and Model Training
Google
Sunnyvale, CA
…mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as…
Added 3 hours ago
ET
Machine Learning Data Engineer
EdgeQ Technologies Private Limited
Remote, United States
- $110,000 to $175,000 USD / year
We are seeking a skilled and experienced Machine Learning Data Engineer to join our growing AI and Data Engineering team in the United States. The ideal candidate will be responsible for…
Added 3 hours ago
TT
Senior Software Engineer, Autonomous Systems
True Talent Solutions Partners
Palo Alto, CA
- $145,000 to $275,000 USD / year
- Engineer scalable, reliable, and fail-safe systems, partnering with robotics, hardware, sensing, and systems engineering teams.
Added 3 hours ago
Senior AI/ML Engineer
Ignite IT
Remote, United States
Ignite IT Hub is seeking a senior AI/ML Engineer to maintain and enhance the U.S. Census Bureau's LLM Autocoder, which assigns standardized codes to survey write-in responses. You will…
Added 3 hours ago
Senior Software Development Engineer , Stores Foundational AI - Rufus
Amazon.com Services LLC
Seattle, WA · Palo Alto, CA
Added 3 hours ago
AI Engineer I
Midwest Physicians Administrative Services, LLC dba Duly Health and Care
Downers Grove, IL
The AI Engineer I is an early-career role within the Data & Analytics team, working with the AI/ML team to implement, deploy, and support the AI platforms and models that improve patient…
Added 3 hours ago
Senior Software Engineer, AI/ML NLP, Deep Learning, Search Infrastructure
Google
Mountain View, CA
…mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as…
Added 3 hours ago
Developer Advocate - AI & Developer Experiences
Snowflake Inc.
Bellevue, WA
Internship, co-op, or project experience as a software, data, ML/AI, or solutions engineer.

Closed listing

SoC Physical Design Engineer

Austin, TX, United States

This opening has closed.

The original listing is kept below for reference.

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Job details

Experience: 8+ years of experience in SoC or ASIC physical design
Posting language: English
Posted: Nov 3, 2026

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Original job description

Archived listing. The details below describe a past opening.

Summary:

Meta’s mission is to give people the power to build community and bring the world closer together. Our global teams are constantly iterating, solving problems, and working together to empower people around the world to build community and connect in meaningful ways. Together, we can help people build stronger communities. We are just getting started.Reality Labs focuses on delivering Meta’s vision through creating advanced AI enabled wearables. The compute performance and power efficiency requirements of wearables require custom silicon. Reality Labs Silicon team is driving the state-of-the-art forward with breakthrough work in AI, augmented reality, computer vision, machine learning, graphics, displays, and sensors. Our chips will enable wearable devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms. As a Physical Design Engineer, you will collaborate closely with System-on-Chip (SoC) architects, front-end and back-end hardware designers, and power/performance teams to drive the physical implementation of IP, subsystems, and the chip top-level in advanced technology nodes. You will be responsible for developing custom methodologies across the physical design cycle – including floorplanning, physical synthesis, placement, clock-tree synthesis, routing, and static timing analysis – to optimize the power, performance, and area of the design while ensuring overall convergence. You will have the opportunity to bring cutting-edge technologies into a high-volume consumer product.

Required Skills:

SoC Physical Design Engineer Responsibilities:

Lead physical implementation, from floorplanning through tapeout, including physically-aware, ultra-low-power logic synthesis, place-and-route, static timing analysis, and EM/IR, at all levels of the SoC hierarchy
Define physical design methodology and flows to realize power and timing intent, and in doing so, meet milliwatt-level always-on power budgets in a wearable form factor, where thermal limits demand perf/mW compute efficiency
Identify and resolve physical implementation bottlenecks related to congestion, timing, and power
then develop automation and AI-assisted flows to improve throughput and QoR
Collaborate with RTL designers to provide implementation feedback that shapes the microarchitecture towards power- and area-efficient timing closure
Work closely with package engineers to ensure the floorplan, clock tree, and power plan meet the product-level power delivery, signal integrity, thermal, and routability requirements
Partner with design verification and DFx teams to ensure physical implementation supports gate-level functional correctness and meets debug and testability requirements
Drive EDA vendor engagement, tool evaluations, and flow improvements

Minimum Qualifications:

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
Bachelor’s degree in Electrical Engineering, Computer Engineering, relevant technical field, or equivalent practical experience
8+ years of experience in SoC or ASIC physical design
Hands-on RTL-to-GDSII experience in 3nm or below, including floorplanning, physical synthesis, placement, clock tree synthesis, routing, static timing analysis, and signoff
Experience with low-power implementation techniques, including power gating, voltage areas/islands, UPF, and DVFS
Experience with static timing analysis, including defining timing constraints, exceptions, and PVT corners/modes for functional and DFT signoff, and accounting for OCV/POCV and crosstalk effects
Experience working with EDA tools such as Fusion Compiler/Genus, ICC2/Innovus, PrimeTime/Tempus, RedHawk/Voltus, or equivalent
Proficiency in scripting (TCL, Python, or Perl) and reading Verilog netlists/RTL
Experience collaborating across RTL, DV, DFx, package, and vendor teams

Preferred Qualifications:

Ownership of block-level and/or full-chip power grid planning: dedicated macro supplies, power-switch chaining, MiM/decoupling caps, and EM/IR closure
Track record of defining signoff criteria and leading tapeout execution
Tapeout experience at 3nm or below
Experience adhering to and implementing responsible, ethical AI practices (e.g. risk assessment, bias mitigation, quality and accuracy reviews)
Experience applying ML-driven implementation (e.g. DSO.ai/Cerebrus) or LLM agents to flow debugging/QoR with measurable impact
Demonstrated ongoing AI skill development (e.g. prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
Background in physically-aware synthesis of ultra-low-power designs, including custom recipes and app options, low-voltage PPA exploration, and UPF authoring
Management of the die area budget, including full-chip partitioning, beachfront allocations, channel planning, and pipeline/feedthrough insertion
Facility with advanced clock-tree synthesis, such as multi-source / H-tree, at block- and/or chip-level, including clock power reduction and hierarchical techniques
Experience leading chip-level timing closure across multi-corner/multi-mode scenarios, authoring I/O timing constraints, parsing flat timing reports, and implementing timing ECOs
Experience with 3D-IC structures (e.g., TSVs), EDA tools, and signoff methodologies
Master’s or PhD degree in Electrical Engineering, Computer Engineering, or equivalent area

Public Compensation:

$178,000/year to $250,000/year + bonus + equity + benefits

Industry: Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.

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Skills

Place-and-route
RTL
EDA
Computer science
Computer engineering
Electrical engineering
DFT
Python
Perl
Verilog
Hazard assessment
ML
Debugging

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