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Sr. Principal Systems Engineer - Configuration Management
Northrop Grumman
Redondo Beach · El Segundo
Northrop Grumman Aeronautics Systems has an opening for a Staff System Engineer-Configuration Management to join our team of qualified, diverse individuals within our Systems Engineering…
Added just now
Staff Systems Engineer - Configuration Management
Northrop Grumman
Redondo Beach · El Segundo
Northrop Grumman Aeronautics Systems has an opening for a Staff System Engineer-Configuration Management to join our team of qualified, diverse individuals within our Systems Engineering…
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Principal/ Sr Principal Systems Engineer- 17395
Northrop Grumman
Roy · Colorado Springs · Huntsville
This candidate will join the Sentinel Systems Engineering & Integration (SE&I) Team. This is a dual level Systems Engineer 3/4 with the primary location of Roy, Utah, we may also consider…
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APQP Engineer
Pentair
Apex, NC
- $82,300 to $152,800 USD / year
We have an opportunity for an APQP Engineer to join our Apex, NC team. You will be responsible for ensuring compliance to product requirements, which leads to customer satisfaction, as well…
Added 1 min ago
Principal Component Engineer
BAE Systems
Hudson, NH
BAE Systems is seeking an experienced Component Engineer in its US Defense Program organization.
Added 1 min ago
Staff Engineer, Mechatronics Design
Celestica
Merrimack, NH
We are seeking a high-caliber Mechatronics Engineer to serve as a global Subject Matter Expert (SME) in the design and implementation of complex Semiconductor capital equipment and…
Added 1 min ago
Entry-Level Electrical Engineer
BAE Systems
Merrimack, NH
BAE Systems is seeking an entry-level Electrical Engineer to join our team in Merrimack, New Hampshire!
Added 1 min ago
Electrical Test & Automation Engineer
Teledyne
Portsmouth, NH
Teledyne DGO is seeking a detail-oriented and hands-on Electrical Test Engineer to support the testing, validation, and qualification of high-reliability electrical and electro-mechanical…
Added 1 min ago
Staff Software Engineer - IAM
General Motors
Concord, NH
You will work as a hands-on engineer: designing systems, writing code, reviewing designs and implementations, and partnering with teams across GM to embed security into the software…
Added 1 min ago
Senior RF Electrical Engineer
Teledyne Defense Electronics, LLC
Rancho Cordova, CA
Use advanced simulation tools to create electromagnetic designs and improve existing products
Added 1 min ago
Process Development Engineer 4
Teledyne Brown Engineering, Inc.
Huntsville, AL
· Analyzes and plans work force utilization, space requirements, and workflow, and designs layout of equipment and workspace for maximum efficiency.
Added 1 min ago
Senior Cybersecurity Architect (Cloud)
Amentum
Concord, NH
Engineer and administer cloud security posture management and workload protection capabilities, including environment onboarding, policy configuration, security recommendations, coverage,…
Added 3 mins ago
Senior Technical Designer - New Glenn
Blue Origin Personnel, LLC
United States
Design and maintain product definition by preparing design layouts and drawings, modifying existing designs and resolving design discrepancies
Added 8 mins ago
Mechanical Engineer, Static Structures & Instrumentation
Mach Industries
Victorville, CA
Mach Industries is seeking a Mechanical Engineer to design and develop static structures and instrumentation hardware for advanced defense platforms. You’ll focus on static mechanical…
Added 8 mins ago
Regional Sales Manager
Vishay Americas, Inc.
Issaquah, WA
…passive electronic components that are essential to innovative designs in the automotive, industrial, computing, consumer, telecommunications, military, aerospace, and medical markets. We…
Added 10 mins ago
Staff DevOps Engineer
Fortastra Corporation
Torrance, CA
Fortastra designs and delivers resilient, high-performance spacecraft that safeguard critical orbital assets and ensure freedom of action in space. We integrate advanced autonomy, sensing,…
Added 12 mins ago
AUKUS Engineer 1 -- Design Eng -- Process
Nuclear Fuel Services
Erwin, TN
…procedures, and criteria under guidance of a manager or experienced engineer. Assignments are designed to develop professional work knowledge and abilities. Works under close supervision.…
Added 12 mins ago
PRINCIPAL ARCHITECT ENGINEER
Dollar General
Goodlettsville, TN
…scalable and secure technical patterns, guides major solution designs, and raises engineering quality across the agent…
Added 12 mins ago
Senior Mechanical Engineer
Hewlett Packard Enterprise
Sunnyvale, CA
Reporting to the Head of Mechanical Engineering, the Senior Mechanical Engineer will be a hands-on individual contributor responsible for the mechanical design, structural analysis,…
Added 12 mins ago
Principal Mechanical Engineer
Hewlett Packard Enterprise
Sunnyvale, CA
Reporting to the Head of Mechanical Engineering, the Principal Mechanical Engineer will be a hands-on individual contributor responsible for the mechanical design, structural analysis,…
Added 12 mins ago
Field Engineer Intern - Kiewit Nuclear Solutions
Kiewit
Oak Ridge, TN
As a Field Engineer Intern , you will assist as the construction site engineering resource and expertise throughout the construction of a project. You will be responsible for interpreting…
Added 12 mins ago
Sr. Software Engineer
BlueCross BlueShield of Tennessee
Chattanooga, TN
We are seeking a Senior Full Stack Engineer with deep expertise in modern frontend and backend development. In this role, you will lead the delivery of scalable applications built with…
Added 12 mins ago
Associate, Project Delivery Engineer
American Water
Chattanooga, TN
…and Instagram. Primary Role The Associate, Project Delivery Engineer is an entry level position in the Engineering function and is responsible for various engineering tasks for water and…
Added 12 mins ago
Mid-Level Full-Stack AI Engineer
CGI Technologies and Solutions, Inc.
Knoxville, TN
CGI is seeking an experienced and innovative Mid-Level Full-Stack AI Engineer to join our growing AI engineering team. In this role, you will lead the design, development, and deployment of…
Added 13 mins ago
Network Development Engineer II - Wireless, OTN-Wireless
Amazon
Nashville, TN
We are looking for a Wireless Network Development Engineer to provide technical thought leadership in the evolution of our next-generation wireless networks. Our networks support an…

SoC Physical Design Engineer

Redmond, WA, United States

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Job details

Experience: 8+ years of experience in SoC or ASIC physical design
Posting language: English
Posted: Nov 3, 2026

Original job description

Summary:

Meta’s mission is to give people the power to build community and bring the world closer together. Our global teams are constantly iterating, solving problems, and working together to empower people around the world to build community and connect in meaningful ways. Together, we can help people build stronger communities. We are just getting started.Reality Labs focuses on delivering Meta’s vision through creating advanced AI enabled wearables. The compute performance and power efficiency requirements of wearables require custom silicon. Reality Labs Silicon team is driving the state-of-the-art forward with breakthrough work in AI, augmented reality, computer vision, machine learning, graphics, displays, and sensors. Our chips will enable wearable devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms. As a Physical Design Engineer, you will collaborate closely with System-on-Chip (SoC) architects, front-end and back-end hardware designers, and power/performance teams to drive the physical implementation of IP, subsystems, and the chip top-level in advanced technology nodes. You will be responsible for developing custom methodologies across the physical design cycle – including floorplanning, physical synthesis, placement, clock-tree synthesis, routing, and static timing analysis – to optimize the power, performance, and area of the design while ensuring overall convergence. You will have the opportunity to bring cutting-edge technologies into a high-volume consumer product.

Required Skills:

SoC Physical Design Engineer Responsibilities:

Lead physical implementation, from floorplanning through tapeout, including physically-aware, ultra-low-power logic synthesis, place-and-route, static timing analysis, and EM/IR, at all levels of the SoC hierarchy
Define physical design methodology and flows to realize power and timing intent, and in doing so, meet milliwatt-level always-on power budgets in a wearable form factor, where thermal limits demand perf/mW compute efficiency
Identify and resolve physical implementation bottlenecks related to congestion, timing, and power
then develop automation and AI-assisted flows to improve throughput and QoR
Collaborate with RTL designers to provide implementation feedback that shapes the microarchitecture towards power- and area-efficient timing closure
Work closely with package engineers to ensure the floorplan, clock tree, and power plan meet the product-level power delivery, signal integrity, thermal, and routability requirements
Partner with design verification and DFx teams to ensure physical implementation supports gate-level functional correctness and meets debug and testability requirements
Drive EDA vendor engagement, tool evaluations, and flow improvements

Minimum Qualifications:

Bachelor’s degree in Electrical Engineering, Computer Engineering, relevant technical field, or equivalent practical experience
8+ years of experience in SoC or ASIC physical design
Hands-on RTL-to-GDSII experience in 3nm or below, including floorplanning, physical synthesis, placement, clock tree synthesis, routing, static timing analysis, and signoff
Experience with low-power implementation techniques, including power gating, voltage areas/islands, UPF, and DVFS
Experience with static timing analysis, including defining timing constraints, exceptions, and PVT corners/modes for functional and DFT signoff, and accounting for OCV/POCV and crosstalk effects
Proficiency in scripting (TCL, Python, or Perl) and reading Verilog netlists/RTL
Experience collaborating across RTL, DV, DFx, package, and vendor teams

Preferred Qualifications:

Ownership of block-level and/or full-chip power grid planning: dedicated macro supplies, power-switch chaining, MiM/decoupling caps, and EM/IR closure
Track record of defining signoff criteria and leading tapeout execution
Tapeout experience at 3nm or below
Experience adhering to and implementing responsible, ethical AI practices (e.g. risk assessment, bias mitigation, quality and accuracy reviews)
Experience applying ML-driven implementation (e.g. DSO.ai/Cerebrus) or LLM agents to flow debugging/QoR with measurable impact
Demonstrated ongoing AI skill development (e.g. prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
Background in physically-aware synthesis of ultra-low-power designs, including custom recipes and app options, low-voltage PPA exploration, and UPF authoring
Management of the die area budget, including full-chip partitioning, beachfront allocations, channel planning, and pipeline/feedthrough insertion
Facility with advanced clock-tree synthesis, such as multi-source / H-tree, at block- and/or chip-level, including clock power reduction and hierarchical techniques
Experience leading chip-level timing closure across multi-corner/multi-mode scenarios, authoring I/O timing constraints, parsing flat timing reports, and implementing timing ECOs
Experience with 3D-IC structures (e.g., TSVs), EDA tools, and signoff methodologies
Master’s or PhD degree in Electrical Engineering, Computer Engineering, or equivalent area

Public Compensation:

$178,000/year to $250,000/year + bonus + equity + benefits

Industry: Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.

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More about this job

Skills

Place-and-route
RTL
EDA
Electrical engineering
Computer engineering
DFT
Python
Perl
Verilog
Hazard assessment
ML
Debugging

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