Jobs in the United States

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Added 2 mins ago
Senior Applications Engineer
Varda Space Industries
El Segundo, CA
Varda is seeking a Senior Applications Engineer to join our team. In this role you will be responsible for leading efforts to develop, deploy, improve, and manage all Engineering…
Added 8 mins ago
High Voltage Engineer
Fermi National Accelerator Laboratory
United States
Fermilab is seeking a High Voltage Engineer to joins the Infrastructure Services Directorate. This individual plans and performs engineering tasks, which includes research, design, and…
Added 9 mins ago
Storage Engineer (TS/SCI)
Vantor Services Inc.
Herndon, VA
Vantor is seeking a Storage Engineer to support the development and integration of intelligence capabilities into test and operational environments. The successful candidate will design,…
Added 12 mins ago
Functional Safety Engineer-HW
indie
Aliso Viejo, CA · MI
The Functional Safety Engineer (FSE) at indie plays a key role within our design organization and is central to our automotive safety culture. In this position, the FSE leads and advocates…
Added 12 mins ago
Senior Engineer II, Systems Engineering
ASM
United States
The Senior Engineer (II), Systems Engineering is a technical leader responsible for the development, integration, qualification, and deployment of advanced sensor technologies across ASM…
Added 13 mins ago
Network Engineer
GD Information Technology, Inc.
United States
Supports the design and build of hardware and software components for computer or telecommunications networks.
Added 13 mins ago
Sr. Network Security Engineer
GD Information Technology, Inc.
United States
The Senior Network Security Engineer is responsible for the configuration, deployment, and management of the customer’s NAC solution in a 24x7x365 environment. The senior engineer is…
Added 18 mins ago
Senior Analog Engineer
Renesas Electronics
Duluth, GA
● Design Verification: Conduct comprehensive simulations and testing to validate design performance and reliability. Address any issues and implement corrective actions as needed.
Added 23 mins ago
A
Motor Design Engineer
Actalent
Poway, CA
- $120,000 to $190,000 USD / year
Job Title: General EngineerJob DescriptionWe are seeking a talented General Engineer to design, develop, and implement DC motors for both new and legacy designs. This role involves leading…
Added 23 mins ago
A
Electrical Inspector
Actalent
Fountain Hills, AZ
- $38 to $48 USD / hour
…projects across Arizona. The Electrical Inspector / Resident Engineer ensures that electrical infrastructure and systems are installed and constructed in accordance with the National…
Added 24 mins ago
Mechatronics Engineer III
Allen Institute
Seattle, WA
The Mechatronics Engineer III is a hands-on engineering role within the Scientific Instrumentation and Process Engineering (SIPE) team. This position designs, builds, and integrates robotic…
Added 24 mins ago
AA
Infrastructure Engineer IV
Aether Aerospace
Boston, MA · Dayton, OH
- $121,813 to $172,000 USD / year
…hardware, software, network, interfaces, high-level/detail design, integration, verification, and regression…
Added 26 mins ago
Sr Cyber Engineer
HealthEquity
United States
This is a hands-on engineering role. You will design, build, deploy, and operate these controls yourself, and you will be accountable for how they perform in production.
Added 28 mins ago
Ultrapure Water (UPW) Quality/ Commissioning Engineer
LotusWorks
Chandler, AZ
As a UPW Engineer, you will support the successful execution, commissioning, and operation of Ultra-Pure Water (UPW) systems. Working closely with System Owners, construction teams, and…
Added 29 mins ago
SA
Senior Staff Systems Security Engineer, Program Protection (TX/DC/Sea) (R6515)
Shield AI
United States
- $175,000 to $315,000 USD / year
…architecture development, and anti-tamper engineering. The engineer will leverage established DoD program protection guidance and engineering frameworks to translate protection objectives…
Added 31 mins ago
Electrical Engineer
Applied Materials, Inc
Santa Clara, CA
Electrical Engineer - Industrial I/O and Control Systems
Added 35 mins ago
FL
Water Systems Manager
FOREST LAWN MORTUARY
Glendale, CA
- $140,000 to $185,000 USD / year
The Senior Water Systems Engineer is Forest Lawn’s senior technical authority for water resource planning, distribution and treatment system design, hydraulic modeling, asset management,…
Added 38 mins ago
Z5
Environmental Qualification & Design Engineer
Zone 5 Technologies
San Luis Obispo, CA
- $171,000 to $230,000 USD / year
Zone 5 Technologies, LLC is seeking a highly skilled Environmental Qualification & Design Engineer to lead the environmental testing, validation, and design integration of advanced…
Added 39 mins ago
Advanced Systems Engineer
Aerospace
Phoenix, AZ
As an Advanced System Engineer here at Honeywell Aerospace, you will lead the design, development, and integration of advanced aerospace test station systems, ensuring they meet the system…
Added 39 mins ago
Sr. Mechanical Design Engineer
Design Hire LLC
Portland, OR
Design Hire is seeking a Senior Mechanical Design Engineer for an established industrial equipment manufacturer known for developing innovative, heavy-duty machinery supporting demanding…
Added 40 mins ago
Software Engineer
INDRA AIR TRAFFIC INC
Overland Park, KS
As a Software Engineer, you will play a critical role in ensuring the quality and reliability of our ground-based radio navigation aids and systems. You will be responsible for developing…
Added 43 mins ago
Senior Project Manager - Retail/Industrial Commercial Real Estate
Lincoln Property Company
Los Angeles, CA
Create, develop, and maintain design and construction team.
Added 46 mins ago
Field Engineering Work Package Planner
TerraPower LLC.
Kemmerer, WY
…The role works closely with the Construction Manager, Field Engineer, Constructors, Site Design Engineering, Project Controls, and Records Management so that crews start work only with a…
Added 52 mins ago
AC
Accenture Construct – Project Coordinator IV (Sustainability), ANS
Accenture Construct
Los Angeles, CA
- $128,000 to $140,000 USD / year
…capital improvement projects throughout planning, scoping, design, procurement, construction, commissioning, and…
Added 52 mins ago
Manufacturing Engineer
Pride Mobility & Quantum Rehab
North Las Vegas, NV
…with responsibility for scope, timelines, implementation, and verification of…

SoC Physical Design Engineer

Redmond, WA, United States

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Job details

Experience: 8+ years of experience in SoC or ASIC physical design
Posting language: English
Posted: Nov 3, 2026

Original job description

Summary:

Meta’s mission is to give people the power to build community and bring the world closer together. Our global teams are constantly iterating, solving problems, and working together to empower people around the world to build community and connect in meaningful ways. Together, we can help people build stronger communities. We are just getting started.Reality Labs focuses on delivering Meta’s vision through creating advanced AI enabled wearables. The compute performance and power efficiency requirements of wearables require custom silicon. Reality Labs Silicon team is driving the state-of-the-art forward with breakthrough work in AI, augmented reality, computer vision, machine learning, graphics, displays, and sensors. Our chips will enable wearable devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms. As a Physical Design Engineer, you will collaborate closely with System-on-Chip (SoC) architects, front-end and back-end hardware designers, and power/performance teams to drive the physical implementation of IP, subsystems, and the chip top-level in advanced technology nodes. You will be responsible for developing custom methodologies across the physical design cycle – including floorplanning, physical synthesis, placement, clock-tree synthesis, routing, and static timing analysis – to optimize the power, performance, and area of the design while ensuring overall convergence. You will have the opportunity to bring cutting-edge technologies into a high-volume consumer product.

Required Skills:

SoC Physical Design Engineer Responsibilities:

Lead physical implementation, from floorplanning through tapeout, including physically-aware, ultra-low-power logic synthesis, place-and-route, static timing analysis, and EM/IR, at all levels of the SoC hierarchy
Define physical design methodology and flows to realize power and timing intent, and in doing so, meet milliwatt-level always-on power budgets in a wearable form factor, where thermal limits demand perf/mW compute efficiency
Identify and resolve physical implementation bottlenecks related to congestion, timing, and power
then develop automation and AI-assisted flows to improve throughput and QoR
Collaborate with RTL designers to provide implementation feedback that shapes the microarchitecture towards power- and area-efficient timing closure
Work closely with package engineers to ensure the floorplan, clock tree, and power plan meet the product-level power delivery, signal integrity, thermal, and routability requirements
Partner with design verification and DFx teams to ensure physical implementation supports gate-level functional correctness and meets debug and testability requirements
Drive EDA vendor engagement, tool evaluations, and flow improvements

Minimum Qualifications:

Bachelor’s degree in Electrical Engineering, Computer Engineering, relevant technical field, or equivalent practical experience
8+ years of experience in SoC or ASIC physical design
Hands-on RTL-to-GDSII experience in 3nm or below, including floorplanning, physical synthesis, placement, clock tree synthesis, routing, static timing analysis, and signoff
Experience with low-power implementation techniques, including power gating, voltage areas/islands, UPF, and DVFS
Experience with static timing analysis, including defining timing constraints, exceptions, and PVT corners/modes for functional and DFT signoff, and accounting for OCV/POCV and crosstalk effects
Proficiency in scripting (TCL, Python, or Perl) and reading Verilog netlists/RTL
Experience collaborating across RTL, DV, DFx, package, and vendor teams

Preferred Qualifications:

Ownership of block-level and/or full-chip power grid planning: dedicated macro supplies, power-switch chaining, MiM/decoupling caps, and EM/IR closure
Track record of defining signoff criteria and leading tapeout execution
Tapeout experience at 3nm or below
Experience adhering to and implementing responsible, ethical AI practices (e.g. risk assessment, bias mitigation, quality and accuracy reviews)
Experience applying ML-driven implementation (e.g. DSO.ai/Cerebrus) or LLM agents to flow debugging/QoR with measurable impact
Demonstrated ongoing AI skill development (e.g. prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
Background in physically-aware synthesis of ultra-low-power designs, including custom recipes and app options, low-voltage PPA exploration, and UPF authoring
Management of the die area budget, including full-chip partitioning, beachfront allocations, channel planning, and pipeline/feedthrough insertion
Facility with advanced clock-tree synthesis, such as multi-source / H-tree, at block- and/or chip-level, including clock power reduction and hierarchical techniques
Experience leading chip-level timing closure across multi-corner/multi-mode scenarios, authoring I/O timing constraints, parsing flat timing reports, and implementing timing ECOs
Experience with 3D-IC structures (e.g., TSVs), EDA tools, and signoff methodologies
Master’s or PhD degree in Electrical Engineering, Computer Engineering, or equivalent area

Public Compensation:

$178,000/year to $250,000/year + bonus + equity + benefits

Industry: Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.

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More about this job

Skills

Place-and-route
RTL
EDA
Electrical engineering
Computer engineering
DFT
Python
Perl
Verilog
Hazard assessment
ML
Debugging

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