Digital Design, SOC Integration Lead

Summary:

Meta’s Reality Labs is seeking a Digital Design, SOC Integration Lead to serve as a technical lead for Machine Learning IP integration. In this role, you will drive the integration of Machine Learning IP blocks into complex system-on-chip designs, bringing together expertise in design, integration, and physical design. You will be responsible for project planning, tracking, and execution while working closely with cross-functional teams, SoC teams, and IP vendors to deliver next-generation ML accelerators that power Meta's AR and VR devices.

Required Skills:

Digital Design, SOC Integration Lead Responsibilities:

• Serve as the technical lead for ML IP integration, driving end-to-end integration from RTL to physical design handoff
• Own project planning, tracking, and execution for ML IP integration efforts
• Lead design and integration activities, including microarchitecture, RTL design, lint, CDC, synthesis, and physical design collaboration
• Partner with cross-functional teams, SoC teams, and external IP vendors to ensure a seamless integration
• Define and drive integration methodologies, flows, and best practices across the silicon team
• Drive root cause analysis and resolution of issues across design, synthesis, and physical implementation stages
• Mentor and guide engineers on ML IP integration and design best practices

Minimum Qualifications:

Minimum Qualifications:

• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
• 12+ years of experience in digital design and IP/SOC integration
• Experience serving as a technical lead for complex IP or SOC integration projects
• Experience with RTL design, integration, lint, CDC, and synthesis flows
• Experience with physical design concepts and collaboration with P.D. teams
• Experience with project planning, tracking, and execution for silicon programs
• Experience working with cross-functional teams and external IP vendors
• Experience with methods for partitioning a solution across hardware and software, evaluating trade-offs such as speed, performance, power, and area
• Experience with scripting languages such as Python, Perl, or Tcl
• Bachelor's degree in Electrical Engineering, Computer Engineering, or relevant field

Preferred Qualifications:

Preferred Qualifications:

• Experience with low-power design techniques and UPF flows
• Master/PhD degree in EE/CS or equivalent areas
• Experience with physical design flows, floorplanning, and timing closure
• Experience with machine learning accelerator hardware design and integration

Public Compensation:

$264,000/year to $341,000/year + bonus + equity + benefits

Industry: Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.