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Lam Research

Process Engineer 5

Fremont, United States

CA San Francisco Bay Area Salary Range for this position: $125,000.00 - $270,000.00.

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Job details

Pay: CA San Francisco Bay Area Salary Range for this position: $125,000.00 - $270,000.00.
Apply by: Apr 26, 2027
Posting language: English
Posted: Oct 28, 2026

Original job description

The group you’ll be a part of

The Office of the CTO is where innovation takes center stage. We inspire our global technical community to take on grand challenges, understand emerging trends, identify the critical inflections, and drive our sustainability, Environment, Social, and Governance (ESG) practices that will define the next generation of semiconductors and continued impact.

The impact you’ll make

As a Process Engineer at Lam, you will operate on cutting-edge technology, harnessing atomic precision, material science, and surface engineering to push technical boundaries. Your role involves developing new and advanced process formulations, defining equipment hardware to meet processing requirements, evaluating test data, and coordinating design requirements to ensure compatibility of processing methods. Your expertise and knowledge play a crucial role our customers success, making an impact on the next generation of semiconductor breakthroughs.

What you’ll do

Conduct plasma etch process research, development, and evaluation in support of Lam’s cutting-edge etch equipment and systems, with emphasis on RIE and patterning applications.
Develop and optimize etch processes for advanced patterning schemes, including EUV and hardmask pattern transfer, multi-patterning (SADP/SAQP), high-aspect-ratio features, and tight CD control.
Characterize and improve etch performance, including profile, CD uniformity, selectivity, line edge and line width roughness (LER/LWR), loading, and defectivity, to increase yields and reduce production costs.
Compile and analyze process and metrology data (CD-SEM, cross-section SEM/TEM, OCD) to establish next steps in process development and determine appropriate limits and variables for process specifications.
Collaborate internally to plan, collect data, analyze results, and report on customer demos for etch and patterning applications.
Partner cross-functionally with lithography, deposition, and integration teams, and with customers, to understand patterning roadmaps, process flows, inflection points, requirements, and business challenges.
Contribute to next-generation etch product development and release activities supporting the semiconductor roadmap.
Provide leadership, clear direction, and guidance to process technicians to support execution activities.
Work closely with customers to introduce and drive adoption of new etch and patterning technologies at customer sites.

Who we’re looking for

Minimum Qualifications:

Master’s degree in Materials Science, Chemical Engineering, Chemistry or Physics or related field with 8+ years of experience; or a PhD with 5+ years’ experience; or equivalent experience.

Preferred qualifications

In-depth background in plasma etch, including Reactive Ion Etching (RIE) and Atomic Layer Etching (ALE), on Inductively Coupled Plasma (ICP) and/or Capacitively Coupled Plasma (CCP) systems.
Hands-on experience with patterning processes such as EUV and 193i pattern transfer, multi-patterning (SADP/SAQP), hardmask open, and high-aspect-ratio etch of dielectric, conductor, or metal films.
Understanding of plasma physics and plasma-surface interactions, and their effect on etch rate, selectivity, profile, and CD control.
Experience with etch and patterning metrology and characterization (CD-SEM, cross-section SEM/TEM, OCD, AFM) and related failure analysis.
Familiarity with working in a laboratory and on semiconductor equipment, including surface preparation and analytical techniques.
In-depth understanding of Statistical Process Control (SPC) and/or Design of Experiments (DOE).
Highly proficient in MATLAB, Python, or other similar scientific computing language.
Experience with statistical tools (JMP, Minitab, etc.) and structured problem-solving methodologies.
Working knowledge of deposition processes (ALD, CVD, PECVD, PVD) and materials characterization, and how they integrate with etch in patterning flows.
Experience working in a collaborative and matrixed environment with diverse teams, semiconductor customers, and/or partners.

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Our commitment

We believe it is important for every person to feel valued, included, and empowered to achieve their full potential. By bringing unique individuals and viewpoints together, we achieve extraordinary results.

Lam Research ("Lam" or the "Company") is an equal opportunity employer. Lam is committed to and reaffirms support of equal opportunity in employment and non-discrimination in employment policies, practices and procedures on the basis of race, religious creed, color, national origin, ancestry, physical disability, mental disability, medical condition, genetic information, marital status, sex (including pregnancy, childbirth and related medical conditions), gender, gender identity, gender expression, age, sexual orientation, or military and veteran status or any other category protected by applicable federal, state, or local laws. It is the Company's intention to comply with all applicable laws and regulations. Company policy prohibits unlawful discrimination against applicants or employees.

Lam offers a variety of work location models based on the needs of each role. Our hybrid roles combine the benefits of on-site collaboration with colleagues and the flexibility to work remotely and fall into two categories – On-site Flex and Virtual Flex. ‘On-site Flex’ you’ll work 3+ days per week on-site at a Lam or customer/supplier location, with the opportunity to work remotely for the balance of the week. ‘Virtual Flex’ you’ll work 1-2 days per week on-site at a Lam or customer/supplier location, and remotely the rest of the time.

Salary

CA San Francisco Bay Area Salary Range for this position: $125,000.00 - $270,000.00.

The above salary range for this position is relevant to applicants that reside or work onsite in the California, San Francisco Bay Area only. Salary offers will depend on factors that include the location you work from, your level, education, training, specific skills, years of experience and comparison to other employees already in this role. Actual salary may vary from salary offered due to numerous factors including but not limited to unpaid time off, unpaid leave, company mandated shutdown, and other relevant factors.

Our Perks and Benefits

At Lam, our people make amazing things possible. That’s why we invest in you throughout the phases of your life with a comprehensive set of outstanding benefits.

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More about this job

Skills

Surface engineering
Research
SEM
Gather data
Leadership
Materials science
Chemical engineering
Statistical process control
SPC
The MathWorks MATLAB
Python
Minitab
Problem solving

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