SoC verification Engineer
- Boston, MA, United States
Applications open in a new tab.
Job details
- Experience
- · Working on full chip verification and OVM/UVM Methodology, System Verilog is a must with 2+years of recent work experience
- Posting language
- English
- Posted
Original job description
Job Description
Job Description:
· Working on full chip verification and OVM/UVM Methodology, System Verilog is a must with 2+years of recent work experience · Worked on passing test cases, test benches, Building environment. · Knowledge of Functional coverage using HVL language features or assertions a plus. · Good Knowledge Gate Level Simulations · Should be ARM based SoC verification only. No need to mention tools. · Proficiency in one scripting language like ,Perl, C/C++, Python, Unix Make, Unix Shell Script
Additional Information All your information will be kept confidential according to EEO guidelines.
More about this job
Skills
- SystemVerilog
- Perl
- C
- C++
- Python
- UNIX
- UNIX Shell