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  • Chief Memory Chip Design Engineer & Architect

    Western Digital

    San Jose, CA

    • $242,900 to $323,800 USD / year

    This role is the most senior technical individual contributor in memory design. Owns end-to-end product architecture from concept through silicon qualification, arbitrates the…

  • Senior Staff Product Engineer

    Renesas

    San Jose, CA

    • $175,000 to $220,000 USD / year

    Knowledge of analog and mix-signal circuitry and the common building blocks, device physics, test methodology and DFT knowledge

  • ASIC DFT Engineer - Acacia (Hybrid)

    Cisco Systems, Inc.

    San Jose, CA

    We are looking for a Design-for-Testability (DFT) Engineer to support DFT implementation, validation, and signoff for complex ASIC / SoC designs. The ideal candidate will have hands-on…

  • Senior Product Quality Engineer – GPU / HPC

    IREN

    San Francisco, CA

    • $240,000 to $300,000 USD / year

    The Senior Product Quality Engineer owns product and manufacturing quality strategy, test methodology, and failure analysis for IREN’s rack-scale AI and accelerated computing platforms.…

  • Senior Principal Engineer, Hardware Application Engineering - Signal Integrity & Power Integrity

    MSI - (Marvell Semiconductor Inc.) US

    Santa Clara, CA

    As Senior Principal Engineer for Signal Integrity and Power Integrity, you will be the senior technical authority responsible for ensuring that customer platforms built on Marvell's…

  • Application Engineer

    Advantest

    San Jose, CA

    As an Application Engineer, you will be working with a dynamic team to provide technical support for the Advantest 93000 Semiconductor Test Systems and Developing Applications for our…

  • Senior Physical Design Engineer

    Microsoft

    CA · Mountain View, CA

    • $119,800 to $261,000 USD / year

    We are looking for a Senior Physical Design Engineer to join the team to support our mission as a key role with silicon design.

  • Design for Test (DFT) Engineer

    Voltai

    Palo Alto, CA

    You'll make sure the chips we work on can be tested in manufacturing and in the field. You'll own DFT architecture and implementation on real silicon programs with leading semiconductor…

  • Hardware Engineer, AI Accelerator Module Design

    Meta

    Santa Clara, CA · Menlo Park, CA

    …through the Open Compute Project Foundation.We are seeking a senior AI Accelerator Module Design Engineer to serve as the technical owner for the electrical and PCB design of accelerator…

  • ASIC DFT Engineer

    ManpowerGroup

    San Jose, CA

    • $65 to $75 USD / hour

    Our client is seeking a Senior ASIC Verification Engineer to join their team. As a Senior ASIC Verification Engineer, you will be part of the engineering organization supporting the DFT and…

  • Sr. Principal Digital Design Engineer

    Insight Global

    Irvine, CA

    • $186,000 to $228,000 USD / year

    Insight Global is seeking a Senior Principal Digital Design Engineer to join our team. In this role, you will focus on the following:

  • RTL Design (all experience range)

    Tylsemi

    San Jose, CA

    As an RTL Design Engineer at Tylsemi, you will design, integrate, and deliver production-quality digital IP and SoC subsystems across a range of high-speed interconnect and chiplet-centric…

  • ASIC DFT Engineer

    Experis USA

    San Jose, CA

    • $65 to $75 USD / hour

    Our client is seeking a Senior ASIC Verification Engineer to join their team. As a Senior ASIC Verification Engineer, you will be part of the engineering organization supporting the DFT and…

  • Senior UCIe Applications Engineer-18808

    Synopsys

    Sunnyvale, CA

    You are an experienced Applications Engineer who brings deep technical credibility, strong customer instincts, and the ability to lead through complexity. With experience in design,…

  • Senior PCB Layout Engineer, Google Cloud

    Google

    Sunnyvale, CA

    As a Senior PCB Layout Engineer designer on the Platforms Infrastructure team, you will be working on developing fast-paced board programs. You will work with hardware, mechanical, and…

  • Senior ASIC DFT DV Engineer (Hybrid)

    Cisco Systems, Inc.

    San Jose, CA

    Responsible for thorough test planning and development of test benches to verify comprehensive Design-for-Test (DFT) architecture that supports ATE screening, in-system test, debug and…

  • Sr. Staff Validation Engineer

    MSI - (Marvell Semiconductor Inc.) US

    Santa Clara, CA

    The Senior Staff Validation Engineer will drive hands-on lab validation and test execution for advanced ASIC/SoC products integrating CXL 3.x, HBM, DDR, PCIe, and high-speed SerDes. This…

  • Senior DFT Design Engineer

    Altera Corporation

    San Jose, CA

    As a Senior DFT Design Engineer, you will be responsible for DFT architecture and implementation, including DFT specifications, test logic insertion, test mode timing constraints, ATPG, and…

  • Senior Physical Design Engineer

    Microsoft

    CA · Mountain View, CA

    • $119,800 to $261,000 USD / year

    We are looking for a Senior Physical Design Engineer to join the team to support our mission as a key role with silicon design.

  • Senior DFT Logic Design Engineer

    Intel Corporation

    CA

    • $141,910 to $269,100 USD / year

    The Aerospace, Defense, Government (ADG) - The Senior DFT Logic Design Engineer provides technical support to Intel Foundry Services customers on our PDKs, DFT/DFM insertion, ATPG…

  • Physical Design Engineer

    Altera Corporation

    San Jose, CA

    We are seeking a Physical Design Engineer to join our Silicon Design Automation & Implementation organization. In this role, you will contribute to the implementation of custom IP and SoC…

  • Senior Physical Design Engineer

    Altera Corporation

    San Jose, CA

    Altera is seeking a highly motivated Senior Physical Design Engineer to join our Physical Design organization. In this role, you will be responsible for implementing custom IP and SoC…

  • ASIC Engineer Intern

    Hewlett Packard Enterprise

    Sunnyvale, CA

    Support Design-for-Test (DFT) methodology development and integration.

  • Principal Solutions Architect – Semiconductor Test

    NVIDIA USA

    CA

    Serve as the senior liaison between build and test engineering for DFT architecture decisions - scan, BIST, JTAG, boundary scan, and embedded compression.

  • Senior Product Engineer, Mixed Signal SOC - TeraWave

    Blue Origin Personnel, LLC

    San Diego, CA · Cupertino, CA

    We are seeking a seasoned Senior Product Engineer to own the production release of a highly integrated mixed-signal System-on-Chip (SOC) for TeraWave. This advanced ASIC combines analog and…