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  • Physical Designer Engineer, Synthesis/PnR

    Rivian

    Palo Alto, CA

    …it for future generations. Role Summary As a Physical Design Engineer, you will contribute to all design phases of physical design of high performance SoC design at both the block and…

  • Senior Foundry Development Engineer

    AttoTude

    Menlo Park, CA

    …using ASICs over dielectric waveguides. We work closely with substrate vendors, foundry partners, cable and packaging subcontractors to move these products from development into…

  • Sr. Engineer, Package Design

    SiTime Corporation

    CA

    The Senior Semiconductor Package Engineer is responsible for the specification, design, development, and qualification of unique custom packaging technology for SiTime’s revolutionary…

  • Principal Engineer, Package Design

    SiTime Corporation

    CA

    The Principal Semiconductor Package Engineer is responsible for the specification, design, development, and qualification of unique custom packaging technology for SiTime’s revolutionary…

  • IC Package Design Engineer

    Rivian

    Palo Alto, CA · Irvine, CA

    …generations. Role Summary We are seeking an IC Package Design Engineer to join our ASIC team. In this role, you will lead the physical layout, modeling, and analysis of advanced…

  • Design Release Engineer- Soft Trim

    Alten USA

    Long Beach, CA

    Lead or support the engineering, packaging, release, and launch of soft trim components including wrapped panels, seat surrounds, soft-touch IP skins, armrests, and textile-based liners

  • Packaging Substrate Engineer

    Apple

    CA

    Our Hardware Technology Packaging team invents, designs, develops, and integrates electronic packaging solutions for Apple’s internal and custom external components of hardware for its…

  • Sr. IC Package Design Engineer (Silicon Engineering)

    SpaceX

    Irvine, CA

    We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation,…

  • Sr. IC Package Design Engineer (Silicon Engineering)

    SpaceX

    Irvine, CA

    We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation,…

  • ASIC Packaging Signal/Power Integrity Hardware Engineer (Hybrid)

    Cisco Systems, Inc.

    San Jose, CA

    We are seeking a qualified Signal and Power Integrity Engineer to help us develop our next generation ASIC packaging to help define, design and verify ASIC packaging to be deployed in a…

  • Senior Power Integrity Engineer, Platforms Infrastructure

    Google

    Sunnyvale, CA

    Design system-level power delivery network solutions across silicon, substrate packaging, and Printed Circuit Boards (PCBs). Partner with cross-functional teams to balance performance,…

  • Senior Principal Engineer, Signal Integrity & Power Integrity (SerDes IP)

    Synopsys

    Sunnyvale, CA

    An experienced SI/PI engineer with deep expertise in high-speed SerDes design and analysis. You have a strong understanding of signal integrity across silicon, package, board, and system…

  • Silicon Packaging Engineer (SIPI)

    Meta

    Menlo Park, CA · Sunnyvale, CA

    Silicon Packaging Engineer (SIPI) Responsibilities:

  • Senior IC Packaging Engineer

    Axiado

    San Jose, CA

    Axiado Corporation is seeking a Senior IC Packaging Engineer to provide technical leadership and architectural ownership of advanced IC and System-in-package(SiP) in a fast-growing startup…

  • Staff Thermal & Thermo-Mechanical Analysis Engineer - Contractor

    TYLsemi, Inc.

    San Jose, CA

    We are seeking a staff-level Thermal & Thermo-Mechanical Analysis Engineer to lead the simulation, modeling, and architectural definition of our next-generation AI data center hardware. In…

  • Principal IC Package Design Engineer

    Ethernovia, Inc.

    San Jose, CA

    • $200,000 to $265,000 USD / year

    We are seeking a visionary and deeply technical Principal IC Package Design Engineer to lead the architecture, design, and execution of advanced packaging solutions for our next-generation…

  • Exterior Trim Design Release Engineer

    ALTEN Technology USA

    Long Beach, CA · Irvine, CA

    Define component requirements, interfaces, packaging, attachment strategy, and design direction in collaboration with cross-functional teams.

  • IC Package Design Engineer

    Apple

    CA

    Our Packaging team defines, designs, and integrates advanced electronic packaging solutions for Apple’s internal and custom components across products including iPhone, iPad, Mac, Apple…

  • IC Package Design Engineer

    Apple

    CA

    Our Packaging team defines, designs, and integrates advanced electronic packaging solutions for Apple’s internal and custom components across products including iPhone, iPad, Mac, Apple…

  • Sr. Staff, Signal Integrity and Power Integrity Engineer

    MSI - (Marvell Semiconductor Inc.) US

    Westlake Village, CA · Santa Clara, CA

    Familiarity with packaging technologies, materials, package substrate design rules and assembly rules

  • Silicon Packaging Technology Engineer

    Meta

    Sunnyvale, CA

    …factor requirements demand custom silicon with cutting-edge packaging solutions. We are seeking a Silicon Packaging Technology Engineer to join our team and drive advanced packaging…

  • Silicon Packaging Engineer (SIPI)

    Meta

    Sunnyvale, CA · Menlo Park, CA

    Silicon Packaging Engineer (SIPI) Responsibilities:

  • Principal Signal and Power Integrity Engineer

    Microsoft

    CA · Mountain View, CA

    • $142,800 to $304,200 USD / year

    Industry knowledge, trends and landscape of technologies to drive development across Silicon-IP, Advanced packaging, Substrate technology, Board technology and Platform design

  • Principal Package Engineer

    Microsoft

    CA · Mountain View, CA

    • $142,800 to $304,200 USD / year

    The principal package engineer will be responsible for providing expertise, insight, and support to the Silicon development team through the entire life cycle of the product. In this role,…

  • Senior Supply Chain Engineer

    Microsoft

    CA · Mountain View, CA

    • $119,800 to $261,000 USD / year

    …SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable…