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Added 18 mins ago
Director, Materials Science (58301)
Applied Technical Services, Inc.
PENNS PARK, PA
Drive cross-functional collaboration and service integration.
Added 18 mins ago
Intern - Systems Engineer – New Kensington, PA – Summer 2027
Philips
New Kensington, PA
Support Systems Engineering activities throughout the product development process under the guidance of experienced engineers. Develop an understanding of how user, business, and regulatory…
Added 18 mins ago
DC
Senior Software Engineer
Danaher Corporation
Downingtown, PA
- $115,000 to $125,000 USD / year
The Senior Software Engineer is responsible for developing and maintaining production software that supports Molecular Devices' life science instruments, including licensing applications,…
Added 19 mins ago
S
I4.0 Software Engineer
Saint-Gobain
MALVERN, PA
- $102,000 to $158,000 USD / year
As part of Saint-Gobain’s Digital Manufacturing Program, the I4.0 Software Engineer plays a critical role in accelerating the digital transformation of manufacturing operations across North…
Added 19 mins ago
Data Center Site Reliability Engineer
Synopsys, Inc.
Canonsburg, PA
…Eligible NoDate Posted 08/10/2026 Data Center Site Reliability Engineer We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly…
Added 19 mins ago
Structural engineer
Middough, Inc.
Cranberry Township, PA
Added 19 mins ago
Digital Systems Engineer
Leidos
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Leidos Defense Systems is seeking a skilled Digital Systems Engineer who loves collaboration and being a part of something big, to join our team. As a Leidos Digital Systems Engineer, you…
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Lead Principal Software Development Engineer
Oracle
Harrisburg, PA
- $135,200 to $306,400 USD / year
As a Sr. Principal Software Development Engineer in the Oracle Cloud Infrastructure (OCI) Core Platform division, you will play a critical leadership role in the architecture, evolution,…
Added 19 mins ago
Principal Software Engineer
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Harrisburg, PA
We are seeking a visionary Principal Software Engineer responsible for building scalable public-facing software applications across Digital Member Experience channels. As a key player…
Added 19 mins ago
Senior Staff Full-stack Engineer - Global Payment Network (Remote - Eligible)
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As an engineer in the Global Payment Network, you will apply your technical acumen to shape and deliver solutions to complex problems at massive scale. You will engineer solutions across…
Added 19 mins ago
AI & Automation Operational Engineer-II
AmerisourceBergen
Harrisburg, PA
…today! Job Details Summary: The AI & Automation Operational Engineer is a hands-on technical role responsible for designing, developing, deploying, supporting, and optimizing enterprise…
Added 19 mins ago
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Principal Software Engineer - (Reston or Cambridge)
Akamai Technologies, Inc.
Harrisburg, PA
- $169,300 to $304,700 USD / year
As a Principal Software Engineer Lead, you will be responsible for:
Added 20 mins ago
Site Reliability Engineer
Highmark Health
Harrisburg, PA
…infrastructure. Identifies and reports issues with assets, devices, integration services, and other equipment. Consults the appropriate parties to develop and deploy a fix/solution or…
Added 20 mins ago
CTO, Anthropic Practice
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Philadelphia, PA
…conversation to a signed deal and live delivery. The focus is agentic process transformation: redesigning end-to-end business processes around Claude-based agents that do real work, not…
Added 20 mins ago
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Knowledge Graph Architect
Eliassen Group
Harrisburg, PA
- $100 to $120 USD / hour
Understanding of RAG/GraphRAG, LLMs, AI agents, and enterprise data integration.
Added 20 mins ago
EG
Dev Lead
Eliassen Group
Harrisburg, PA
- $110 to $120 USD / hour
Own pull request process with AI-assisted review before human review and enforce coding norms and patterns.
Added 48 mins ago
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Knowledge Graph Architect
Eliassen Group
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- $100 to $120 USD / hour
Understanding of RAG/GraphRAG, LLMs, AI agents, and enterprise data integration.
Added 48 mins ago
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Dev Lead
Eliassen Group
Little Rock, AR
- $110 to $120 USD / hour
Own pull request process with AI-assisted review before human review and enforce coding norms and patterns.
Added 59 mins ago
Electronic System Design and Analysis Engineer (Experienced or Senior)
The Boeing Company
Berkeley, MO
…Missouri is seeking an Electronic System Design and Analysis Engineer to join our Instrumentation Installation Design group to support all major programs in the St. Louis…
Added 59 mins ago
Associate Mechanical Systems Design & Analysis Engineer
The Boeing Company
Berkeley, MO
…is seeking an Associate Mechanical Systems Design & Analysis Engineer to join our Instrumentation Installation Design group supporting flight test…
Added 59 mins ago
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Systems Test Engineer
Actalent
Bridgeton, MO
- $93,000 to $125,000 USD / year
The Systems Test Engineer is responsible for designing, planning, and executing systems-level testing for complex products, systems, and subsystems that may include electrical, mechanical,…
Added 59 mins ago
Engineer III- Technology
Edward Jones
St. Louis, MO
Contribute to the adoption and integration of AI-enabled capabilities, automation, and data-driven solutions where appropriate
Added 1 hour ago
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Knowledge Graph Architect
Eliassen Group
Jefferson City, MO
- $100 to $120 USD / hour
Understanding of RAG/GraphRAG, LLMs, AI agents, and enterprise data integration.
Added 1 hour ago
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Dev Lead
Eliassen Group
Jefferson City, MO
- $110 to $120 USD / hour
Own pull request process with AI-assisted review before human review and enforce coding norms and patterns.
Added 1 hour ago
Integration Manager, SME
Chenega Corporation
Ft Belvoir, VA
…understand their market data through the synchronization of process innovation, human dynamics, analysis, and the integration of data technology capabilities, to ensure functional…

Closed listing

Intel

Senior SoC Physical Layout & Full-Chip Integration Engineer

Hillsboro, OR, United States

$122,440 to $232,190 USD / year

This opening has closed.

The original listing is kept below for reference.

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Job details

Pay: $122,440 to $232,190 USD / year
Posting language: English
Posted: Sep 17, 2026

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Original job description

Archived listing. The details below describe a past opening.

Job Details:

Job Description:

About the Role

Join the Design Technology Platform (DTP) organization within Intel Foundry and help drive the development of the methodologies, physical layouts, and silicon platforms that enable next-generation semiconductor technologies.

As a member of the X-Chip Full-Chip Integration team, you will play a key role in developing custom layout methodologies, leading full-chip physical integration, and driving physical verification and tapeout execution for advanced testchip and silicon lead vehicles on cutting-edge process technologies.

This role is ideal for engineers who have a passion for custom layout design, advanced-node physical design methodologies, and solving complex physical integration challenges. You will work at the intersection of technology development, physical design, verification, and manufacturing, collaborating with experts across Intel Foundry to enable future process technologies and silicon solutions.

What You'll Do

Responsibilities include, but are not limited to:

Lead full-chip floorplanning, physical integration, and tapeout activities for advanced-node silicon development vehicles.
Develop and enhance custom layout methodologies and physical design flows.
Drive physical verification closure, including DRC, LVS, DFM, density, and antenna rule compliance.
Collaborate with Technology Development, PDK, and EDA teams to implement scalable and manufacturable design solutions.
Analyze advanced-node design rules and contribute to design enablement for emerging process technologies, including FinFET and Gate-All-Around (GAA) architectures.
Develop automation solutions using Tcl, Python, SKILL, or similar scripting languages to improve design productivity and quality.
Coordinate cross-functional activities to ensure tape-in readiness, database integrity, and successful project execution.

Successful Candidates Will Demonstrate

Strong ownership and accountability for delivering high-quality technical results.
Ability to make sound technical decisions with limited information and effectively communicate technical tradeoffs.
Excellent project planning, prioritization, and execution skills.
Strong collaboration and influence across multiple engineering disciplines and organizations.
Effective verbal and written communication skills with both technical and non-technical stakeholders.
Curiosity and enthusiasm for learning emerging semiconductor technologies and methodologies.
Ability to navigate ambiguity and solve complex technical challenges in fast-paced development environments.
Continuous improvement mindset focused on automation, scalability, quality, and engineering efficiency.

Why Join Intel Foundry?

At Intel Foundry, you'll have the opportunity to influence the future of semiconductor technology by helping develop the methodologies and silicon platforms that enable next-generation manufacturing processes.

In this role, you will:

Work on some of the industry's most advanced semiconductor technologies and process nodes.
Collaborate with world-class experts across design, process technology, manufacturing, yield engineering, and EDA development.
Drive highly visible projects that directly impact technology readiness and future product development.
Gain exposure across the full silicon lifecycle, from concept and methodology development through tape-in and silicon validation.
Expand your technical leadership while solving challenging engineering problems at global scale.
Benefit from Intel's commitment to innovation, career development, and comprehensive employee benefits.
See Intel Benefits (https://www.intel.com/content/www/us/en/jobs/benefits.html) for more details.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications and Experience:

Masters' degree in Electrical Engineering, Computer Engineering, or a related field with 4+ years of industry experience. OR a PhD’s degree in the same filed with 1+ years of industry experience.

Your experience outlined above must be in the following:

Custom/analog/mixed-signal layout design experience in advanced technology nodes.
Front-end (FEOL) layout design rules, transistor-level matching, parasitic layout concepts, and custom silicon structures..
Debugging skills in physical verification (LVS, DRC, and DFM) using industry-standard verification engines (such as Calibre or ICV), with a proven ability to solve complex, systemic layout errors.
Tcl, Python, or SKILL to automate layout creation, checking, and full-chip database manipulation.

Preferred Qualifications and Experience:

Experience with top-level floorplanning, RDL/bump planning, or backside power delivery (PowerVia) implementation.
Proven track record of collaborating with PDK and Technology Development teams on design rule definitions, test structure vehicles, or DRC suppression strategies.
Experience managing physical tapeout schedules, IP tracking matrices, and formal physical design Quality Assurance (QA) flows.
Familiarity with custom layout environments (such as Cadence Virtuoso) and translating custom databases into full-chip NDM flows.
Previous related work experience in a semiconductor foundry preferred.

Location:

Primary – Hillsboro OR

Additional – Chandler AZ, Austin TX.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

US, Arizona, Phoenix, US, Texas, Austin

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel (https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003) .

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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