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Lead Software Engineer
JPMC page
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Sr. Lead Software Engineer
JPMC page
New York, NY · NY · Jersey City, NJ · Plano, TX · Columbus, OH
As a Sr Lead Software Engineer at JPMorganChase within Trust and Security, you are an integral part of an agile team that works to enhance, build, and deliver trusted market-leading…
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Strong Python development experience for production automation, tooling, and integrations, including maintaining and modernizing existing codebases
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Senior Manager, Clinical Quality Assurance (Contract)
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Senior Controls & SCADA Engineer - Data Centers Job Details | Black & Veatch Family of Companies
Black & Veatch
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Senior Controls & SCADA Engineer - Data Centers
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Associate Process Engineering - Industrial Water Job Details | Black & Veatch Family of Companies
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Lead Software Engineer
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Senior Construction Manager - Water - Arkansas 1 Job Details | Black & Veatch Family of Companies
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Intel Corporation

Principal Engineer, SOC Performance Architecture

OR, United States
CA, United States
TX, United States

$220,920 to $311,890 USD / year

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Job details

Pay: $220,920 to $311,890 USD / year
Posting language: English
Posted: Nov 4, 2026

Original job description

Job Details:

Job Description:

The Role and Impact

As a Principal Engineer in SoC Performance Architecture, you will be at the forefront of developing and driving the end-to-end architectural Power and Performance specifications for cutting-edge, modular, and scalable Datacenter Products that will power the next generation of computing. This role offers the unique opportunity to influence the technical direction of both Intel and the broader industry, ensuring our leadership in performance, power efficiency, and scalability. Your contributions will directly impact Intel's ability to deliver innovative solutions across diverse market segments, from high-performance computing to ultra-low power products. This is a pivotal position that combines technical strategy, architectural innovation, and leadership to shape the future of the Intel Datacenter organization.

Key Responsibilities

Drive the development of SOC Architecture PnP specifications, including product viability of feature requirements through SOC and IP Modeling, and hardware-software interoperability throughout the product lifecycle.
Define and evaluate feasibility tradeoffs for performance, power, frequency, area, and features to meet Datacenter Product requirements across multiple segments.
Conceptualize, invent, and specify modeling of architectural and microarchitecture features that deliver optimized product requirements for varying use cases.
Develop and document new methodologies to support emerging use cases, improve existing ones, and extend Performance and Power predictive modeling impact.
Model SOC Performance and Power, analyze current bottlenecks, and explore novel approaches for future workloads.
Create tests, test plans, and testing infrastructure for new architectures and features, conduct simulations, and analyze test results using advanced statistical models and data predictions.
Provide experimental proof-of-concept solutions to propose design alternatives that meet constraints related to performance, power, area, and timing.
Collaborate with cross-functional teams including architects, design, verification, and validation engineers to execute project requirements seamlessly.
Deliver new microarchitecture modeling and resolve issues during feature implementation to improve product design and overcome challenges.
Influence and challenge cross-functional roadmaps while defining technology targets for future Datacenter products.
Mentor and develop technical leaders, foster community growth, and act as a change agent while exemplifying Intel values in every aspect of your work.

We invite you to join Intel and play a critical role in shaping the future of technology while growing your career in a collaborative, innovative, and inspiring environment.

Qualifications:

Minimum Qualifications

Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field, and 12+ years of relevant experience; or Master's degree and 10+ years of relevant experience; or PhD and 8+ years of relevant experience.
10+ years of experience in Performance architecture and microarchitecture, bottleneck analysis, and optimization for Server workloads.
10+ years of experience in testing and simulation tools, advanced statistical modeling, and data-driven predictions.
10+ years of experience delivering experimental proof-of-concept solutions and driving end-to-end execution of architectural designs.

Preferred Qualifications

Track record of influencing technical strategy and leading cross-functional teams to achieve organizational goals.
10+ years of experience mentoring and developing technical leaders and fostering innovation within a team or organization.
Exceptional communication skills and the ability to challenge, inspire, and lead diverse groups.
Familiarity with industry trends and the ability to align technical vision with market demands to maintain leadership in performance, power optimization, and scalability.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

US, California, Santa Clara, US, Texas, Austin

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $220,920.00-311,890.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. *

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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Skills

Product comprehension
Run simulations
Computer engineering
Electrical engineering
Computer science
Coaching
Communication skills
Leadership

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