Senior ASIC Design Engineer

Required Skills & Experience

• 8-10+ years of hands-on digital ASIC or SoC design and development experience
• BS or MS in Electrical Engineering or equivalent, with VLSI design experience
• Strong front-end ASIC design experience
• Demonstrated experience owning designs across the ASIC lifecycle, including: ○ RTL design/coding ○ Functional verification ○ Synthesis ○ Static Timing Analysis (STA) ○ Silicon validation/characterization
• Strong experience with Verilog and SystemVerilog
• Hands-on experience with Synopsys and Cadence EDA tools
• Experience with simulation, synthesis, timing analysis, formal verification and/or assertion-based verification
• Strong understanding of embedded systems and hardware/firmware integration
• Programming/scripting experience with Python, Perl, C and/or C++
• Experience with source/code management tools such as Git, GitHub or Subversion
• Strong technical troubleshooting and triage experience Demonstrated leadership, collaboration, and communication skills

Nice to Have Skills & Experience

• FPGA prototyping experience
• ARM microprocessor subsystem experience
• Memory/storage subsystem experience, including DDR, Flash and/or eMMC
• Imaging or image-processing experience
• Printing/LaserJet technology experience
• Design database management and ASIC design-flow automation/scripting
• Experience working with electronic components, PCA designs, and test equipment Experience using AI/LLM Copilot tools to improve ASIC design, verification, or engineering productivity

Job Description

One of Insight Global’s clients is seeking a Senior ASIC Design Engineer to join its R&D engineering team in Vancouver, WA. This individual will be a senior, hands-on contributor responsible for the front-end design and development of digital ASIC/SoC solutions, supporting products from RTL design and functional verification through silicon validation and qualification. The ideal candidate will have 8-10+ years of ASIC/SoC design experience and a strong background in Verilog/SystemVerilog, Synopsys and Cadence EDA tools, synthesis, static timing analysis, and embedded systems. This person will also provide technical leadership, collaborate with global engineering teams, and help troubleshoot complex hardware/firmware integration issues.

Responsibilities

• Lead functional blocks and/or subsystems of digital ASICs from RTL design through silicon verification and qualification
• Perform hands-on RTL coding, functional verification, synthesis, timing/STA, and silicon validation
• Own front-end ASIC/SoC design, ensuring circuits meet functional and technical requirements before physical design
• Collaborate with internal and external engineering teams to define specifications, conduct design reviews, and complete technical documentation
• Lead technical triage of hardware and firmware integration issues and drive problems through resolution
• Work closely with embedded firmware and hardware teams throughout the product development lifecycle
• Support ASIC prototyping through FPGA and/or software models for pre-silicon development and verification
• Contribute to ASIC architecture, design methodology, automation, and future technology roadmaps Partner with engineering teams in the U.S. and Asia, including occasional meetings outside normal working hours