Quantum PDK Engineer

Introduction

A career at Anderon provides the rare opportunity to help define a new industry. We’re a wafer foundry that’s commercializing semiconductor manufacturing for quantum chips. You’ll partner with innovative clients and leading researchers to develop the technology needed to build the coming quantum economy.

*Please note: Anderon uses IBM's recruitment platform for candidate applications and hiring workflows. While this role is with Anderon, all applications will be submitted and processed through IBM's careers system.

Your role and responsibilities

The Quantum PDK Development Engineer strongly influences the technical direction and quality of the Process Design Kit for quantum circuits. They define the architecture, drive release strategy, and make key decisions that balance process capability, model maturity, and designer needs. They also own the design manual that tells designers how to use the PDK, and they lead other engineers. They serve as the primary technical link between process, modeling, test, EDA, and customers.

Core responsibilities

• PDK architecture and release strategy. Define the structure, contents, versioning, and maturity framework of PDK releases. Set release plans, gates, and change control, and own the technical roadmap.
• Design manual development and management. Own the design manual from outline through each release. Define its structure, content standards, and authoring and review process. Keep it accurate and consistent with the process, models, design rules, and PDK contents for each release. Organize it so that general guidance stays stable across releases and release-specific details are isolated and easy to update. Manage contributions from process, modeling, test, and design teams, and maintain version control, change history, and traceability to PDK releases.
• Technical leadership and mentoring. Guide junior engineers, review their work, set technical standards, and lead design and code reviews.
• Design rules and technology definition. Own layer stack, technology files, and design rule definitions. Work with process integration to align rules with fabrication capability and drive trade-off decisions.
• Device library strategy. Define the PCell and device library roadmap. Review complex PCell architectures for accuracy, manufacturability, and maintainability.
• Model strategy and integration. Work with modeling engineers to set model requirements, calibration needs, and acceptance criteria. Decide when models are mature enough for each release.
• Verification and sign-off. Own the verification strategy, including DRC, LVS, and EM or parasitic extraction. Define sign-off criteria and resolve the hardest tool-flow issues.
• EDA toolchain and vendor management. Define the supported toolchain. Work with CAD, IT, and EDA vendors on tool selection, versions, licensing, and compatibility.
• Test strategy and calibration feedback. Help define the test structure and measurement plan. Make sure measured data feeds back into models, rules, the design manual, and releases with traceability.
• Quality and risk management. Define validation strategy, regression coverage, and defect-handling processes. Identify and manage technical and schedule risks.
• Customer and stakeholder engagement. Act as senior technical contact for design teams and external customers. Gather requirements and feedback on the design manual and PDK, set expectations, and prioritize fixes and enhancements.
• Infrastructure and automation. Define the build, release, and test pipeline. Drive standards for version control, reproducibility, and traceability.
• Documentation and communication. Own the quality of release notes and other PDK documentation alongside the design manual. Present status, risks, and trade-offs to engineering leadership and executives.
• Cross-functional influence. Shape process, modeling, and design practices where they affect PDK quality and usability.

Required technical and professional expertise

• BS, MS, or PhD in electrical engineering, physics, computer engineering, or a related field. An advanced degree is preferred but not required with equivalent experience.
• About 5 or more years of experience developing or supporting PDKs, technology files, or design-enablement flows.
• Proven record of delivering PDK releases or similar design-enablement products, including layout, DRC/LVS, extraction, and PCells.
• Experience authoring and maintaining design manuals, PDK documentation, or similar technical reference material for design teams.
• Deep, hands-on expertise with EDA layout and verification tools (e.g., Cadence Virtuoso, Synopsys, or similar).
• Strong scripting skills (Python, SKILL, TCL, or similar) and experience designing automation and release pipelines.
• Strong understanding of semiconductor or microfabrication process flows and how they translate into design rules.
• Demonstrated technical leadership, including mentoring and cross-functional collaboration.
• Excellent written and verbal communication skills.

Preferred technical and professional experience

• Experience with superconducting circuits or quantum devices, including circuit QED and Josephson junction physics.
• Experience with EM simulation tools (e.g., Ansys HFSS/Q3D, Sonnet, COMSOL) or compact model development.
• Experience with TCAD tools (e.g., Synopsys Sentaurus or similar).
• Familiarity with cryogenic measurement and device characterization.
• Experience with foundry or fab-to-customer enablement, including external customer support.
• Experience with CI/CD, release management, or software quality practices at scale.
• Experience with documentation tooling and automated or single-source publishing workflows.
• Experience with a PDK transition or spin-out from a larger organization.

IBM is committed to creating a diverse environment and is proud to be an equal-opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender, gender identity or expression, sexual orientation, national origin, caste, genetics, pregnancy, disability, neurodivergence, age, veteran status, or other characteristics. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status.