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Closed listing

Hewlett Packard Enterprise

VLSI Physical Design Engineer

Ft. Collins, CO, United States
Chippewa Falls, WI, United States
Bloomington, MN, United States

United States of America: Annual Salary USD 115,000 - 218,000 in Colorado // 109,000 - 251,000 in Minnesota & Wisconsin The listed salary range reflects base salary.

This opening has closed.

The original listing is kept below for reference.

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Job details

Pay: United States of America: Annual Salary USD 115,000 - 218,000 in Colorado // 109,000 - 251,000 in Minnesota & Wisconsin The listed salary range reflects base salary.
Experience: 1-6 years of experience in VLSI design, verification, or implementation
Posting language: English
Posted: Oct 29, 2026

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Original job description

Archived listing. The details below describe a past opening.

VLSI Physical Design Engineer

This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office.

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.

Job Description:

Job Family Definition:

Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation, and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits. Analyzes designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication.

Management Level Definition:

Contributions include applying developed subject matter expertise to solve common and sometimes complex technical problems and recommending alternatives where necessary. Might act as project lead and provide assistance to lower level professionals. Exercises independent judgment and consults with others to determine best method for accomplishing work and achieving objectives.

Responsibilities:

Perform static timing analysis for hierarchical designs at both partition and full-chip levels.
Create, validate, and maintain timing constraints and timing budgets for design and process requirements.
Drive timing closure for partition-level and full-chip designs, including setup, hold, clock, I/O, and test timing.
Analyze timing reports, identify critical paths, and implement fixes to achieve performance, power, and area objectives.
Perform synthesis, netlist quality checks, and formal verification.
Support chip partitioning, floorplanning, and physical design implementation.
Create and manage functional engineering change orders (ECOs).
Develop flow automation and methodology improvements for synthesis, timing analysis, formal verification, physical design, and signoff, often using AI to improve methodologies.
Partner with cross-functional engineering teams to promote physical-design-aware architecture and implementation.
Review design and project activities for compliance with ASIC technology, methodology, and development standards.
Collaborate with external physical design partners to close timing and complete back-end flows.
Provide technical guidance and mentoring to less-experienced engineers and contribute to continuous improvement across the design organization.

Education and Experience Required:

Bachelor's or Master's degree in Electrical Engineering, Computer engineering or equivalent
1-6 years of experience in VLSI design, verification, or implementation

Preferred Qualifications

Experience with hierarchical timing analysis and full-chip timing closure.
Experience with clock, I/O, test, and other specialized timing-closure challenges.
Experience developing ASIC implementation flows, automation, and design methodologies.
Experience working with advanced process technologies and complex, high-performance ASIC designs.
Experience navigating AI tools and methodologies to run design experiments, learn new information, and optimize flows.
Demonstrated ability to provide technical leadership, mentor engineers, and influence cross-functional design decisions.
Publications, patents, or other demonstrated contributions in ASIC, VLSI, physical design, or electronic design automation.

Knowledge and Skills:

Strong knowledge of electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture
Experience with one or more of the following:
Static timing analysis and timing signoff
Timing constraints and validation
Synthesis and netlist quality analysis
Formal verification
Floorplanning and chip partitioning
ECO implementation
Experience with industry-standard EDA tools, such as Synopsys Fusion Compiler, Design Compiler, PrimeTime, or Formality, and/or Cadence RTL Compiler, Genus, or LEC.
Strong analytical and problem solving skills.
Strong knowledge of a programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools. Coursework in VLSI design or VLSI concepts.
Strong written and verbal communication skills; mastery in English and local language.
Ability to work independently and collaboratively across multiple engineering disciplines.

Accessibility

HPE is committed to creating an inclusive and accessible workplace and encourages applications from all qualified individuals, including those with disabilities. If you believe you require accommodation during any stage of the application or interview process, please submit your request by completing our secure form linked here.

Note: This option is reserved for applicants needing assistance/reasonable accommodation related to a disability.

What We Can Offer You:

Health & Wellbeing We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.

Personal & Professional Development We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have - whether you want to become a knowledge expert in your field or apply your skills to another division.

Unconditional Inclusion We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

Let's Stay Connected:

Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE.

#unitedstates

#highperformancecompute

Job:

EngineeringJob Level:

TCP_03 "The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level.

United States of America: Annual Salary USD 115,000 - 218,000 in Colorado // 109,000 - 251,000 in Minnesota & Wisconsin The listed salary range reflects base salary. Variable incentives may also be offered."

Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html

The estimated job application period closure is February 1 2027; this timeline is provided for transparency and internal planning purposes.

HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: Equal Employment Opportunity.

Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.

HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.

Recruitment Fraud Alert

We have become aware of an increase in fraudulent recruitment activities in which individuals impersonate our company or authorized recruitment agencies to offer fake employment opportunities. These scams may occur through false websites, emails, social media, or chat-based applications and often aim to obtain personal information or money. Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. We also never request personal information such as back account details, Social Security numbers, or national IDs via social media or chat applications.

All legitimate job opportunities will come through official company channels, and candidates are responsible for verifying the credentials of any third party claiming to represent the company. Any reliance on fraudulent communication is at the individual’s own risk, and HPE disclaims legal liability for any resulting damages. If you suspect recruitment fraud, do not share personal information or make any payments and report the incident to your local authorities immediately.

About employer

More about this job

Skills

Integrated circuits
Statistical quality control
Regulatory compliance
Coaching
Process improvement
Electrical engineering
Computer engineering
Leadership
EDA
RTL
Problem solving
Communication skills
Work independently

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