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Added 13 mins ago
M
Principal Product Engineer
Microsoft
CA · OR · NC · TX · Mountain View, CA · Hillsboro, OR · Raleigh, NC · Austin, TX · Mountain View · Hillsboro · Raleigh · Austin
- $142,800 to $304,200 USD / year
We are looking for a Principal Product Engineer to join the team.
Added 33 mins ago
C
Automation Engineer
CBRE
Tracy, CA
- $115,606.4 USD / year
…We’re looking for a skilled and forward-thinking Ctrl Systems Engineer / Automation Engineer (AE) to join our growing team as we work to service one of the world’s largest online…
Added 33 mins ago
ES
Material Handler I
Empirical Systems Aerospace, Inc.
San Luis Obispo, CA
- $20 to $25 USD / hour
We are seeking a dependable Material Handler I to support production by managing inventory, moving materials, and maintaining accurate records. The Material Handler I ensures smooth…
Added 33 mins ago
Deputy Supply Chain Director
Empirical Systems Aerospace, Inc.
San Luis Obispo, CA
…R&D organization. This role is responsible for procurement, production planning, inventory control, logistics, and supplier quality, ensuring alignment with company growth objectives,…
Added 34 mins ago
Operations AI Engineer - Early Career
Lockheed Martin
Palmdale, CA
Leverage and create AI solutions to transform aero operations by optimizing production, elevating quality, and enabling predictive modeling.
Added 34 mins ago
Senior RTL Design Engineer, TPU
Google
Sunnyvale, CA
…Intellectual Property (IP) with the focus on management and control subsystem, also participate in developing infrastructure and methodology that form the foundation of our SoCs (i.e.,…
Added 34 mins ago
Staff NPI Engineer - Johnson and Johnson MedTech, Circulatory Restoration
J&J Family of Companies
Santa Clara, CA
The Staff NPI Engineer will utilize technical skills in the development of innovative products to treat peripheral, coronary, and heart valve diseases. The Staff NPI Engineer will serve as…
Added 35 mins ago
Sr. NPI Engineer - Johnson and Johnson MedTech, Circulatory Restoration
J&J Family of Companies
Santa Clara, CA
The Senior NPI Engineer is responsible for designing, developing, testing, documenting, and implementing processes, tooling, and fixtures throughout the product lifecycle, from design…
Added 35 mins ago
Engineer/Principal Engineer Aeronautical - Hardware Avionics
Northrop Grumman
San Diego, CA
…the following subsystems: Radar Altimeter (RadAlt), Air Data System (ADS), and electro-mechanical flight control actuation system. The selected individual will work independently and…
Added 35 mins ago
Specialist, Test Engineer
L3Harris
San Diego, CA
We are seeking an experienced Test Engineer to support the design verification, characterization, and integration of automated RF test systems and subsystems (ATS). The ideal candidate will…
Added 35 mins ago
Engineer VII
General Atomics
San Diego, CA
…applications, power electronics, high-power computing, or digital control of power supplies and control systems; guiding a design through development and into…
Added 36 mins ago
Lead Manufacturing Engineer
Winchester Interconnect
Garden Grove, CA
…Instructions (WIs), Manufacturing Process Specifications, and Control Plans within the ERP…
Added 36 mins ago
Manufacturing Engineer
Hadrian Automation
Torrance, CA
We are seeking a Manufacturing Engineer to lead the development of highly automated work cells in support of new manufacturing capabilities and production facilities. In this role, you will…
Added 36 mins ago
Test and Evaluation Engineer
BOOZ, ALLEN & HAMILTON, INC.
San Diego, CA
As a Test and Evaluation Engineer, you'll serve as a member of a multidisciplinary product team responsible for planning, conducting, documenting, and improving engineering test and…
Added 1 hour ago
Senior Payments Infrastructure Engineer - Crypto, Wallets & Blockchain
Jobgether
Remote, United States
…payments, and digital wallets. As Senior Payments Infrastructure Engineer, you will take hands-on ownership of an existing payments backend and drive it through integration, testing, and…
Added 1 hour ago
SS
AF&F ENGINEERING/PROGRAM MANAGEMENT
STRATEGIC SYSTEMS PROGRAMS (SSP)
Washington Navy Yard, DC
- $143,913 to $197,200 USD / year
…leading the development and qualification of the advanced fuzing system. | You will be responsible for requirement and specification creation, design and development, production support,…
Added 1 hour ago
Senior Engineer, Bulk Gas
Micron Idaho Semiconductor Manufacturing (Triton) LLC
Boise, ID
As Senior Engineer, Bulk Gas, you will be essential to our growth, guiding technical efforts for extensive gas production, storage, supply, and distribution systems that support significant…
Added 1 hour ago
Senior Engineer, Bulk Gas
Micron Idaho Semiconductor Manufacturing (Triton) LLC
Boise, ID
As a Senior Bulk Gas Build Engineer, you will provide technical leadership for large-scale gas production, storage, supply, and distribution systems supporting major semiconductor…
Added 1 hour ago
NA
GENERAL ENGINEER
Naval Air Systems Command
Patuxent River, MD
- $143,913 to $197,200 USD / year
You will serve as the lead engineer overseeing design, development, production, modification, and sustainment of the E-130J Air Vehicle, including the C-130J-30s procured and provided as…
Added 1 hour ago
Mechanical and Aerospace Engineer III
Arcfield
Colorado Springs, CO
Arcfield is seeking a mechanical and aerospace engineer to support our strategic programs work in Colorado Springs. Arcfield has supported our U.S. Navy Strategic Systems Programs (SSP)…
Added 1 hour ago
Facilities Principal Mechanical Engineer
GlobalFoundries
ROUND LAKE, NY
…GlobalFoundries Fab 8 is seeking a highly skilled and motivated Engineer to fill Facilities Engineering Position in the Facilities Department covering the Mechanical Operations and…
Added 2 hours ago
Electrical Engineer
ITAC
Wilmington, NC
Understanding use and set-up of machine controls for system analog and digital I/O requirements, control sequence logic, fail safe states and recovery sequence digital and analog I/O
Added 2 hours ago
NA
GENERAL ENGINEER
National Air and Space Intelligence Center
Wright-Patterson AFB, OH
- $132,751 to $172,578 USD / year
…execute and conduct all-source technical Integrated Command, Control, Communications & Computers, Intelligence, Surveillance & Reconnaissance (C4ISR) intelligence analysis and production of…
Added 2 hours ago
AN
AIRCRAFT MECHANIC - TITLE 32
Army National Guard Units
Hunter AFB, GA
- $35 to $40 USD / hour
…assigned aircraft. Work closely with maintenance supervisor(s) and production control personnel to report and maintain current aircraft…
Added 3 hours ago
System Engineer
InterImage
Fort Meade, MD
(U) The Level 5 System Engineer shall possess the following capabilities:

Google

Senior RTL Design Engineer, TPU

Sunnyvale, CA, United States

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Job details

Experience: 8 years of experience in ASIC design.
Posting language: English
Posted: Oct 9, 2026

Original job description

Senior RTL Design Engineer, TPU

Share Senior RTL Design Engineer, TPU

corporate_fare Google place Sunnyvale, CA, USA

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Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

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XIn most instances, this position requires in-person interviews as part of the hiring process.

Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience in ASIC design.
Experience with SystemVerilog/RTL coding.
Experience with scripting languages (e.g., Tcl, Python or Perl).

Preferred qualifications:

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience interacting with software, system hardware, and other cross-functional teams.
Experience with chip management, clocking, reset, and peripherals like I2C, SPI, UART, etc.
Understanding of digital design fundamentals, including synchronous and asynchronous logic, state machines and bus protocols.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

In this role, you will join a team working on SoC-level RTL design for our data center accelerators. You will design RTL Intellectual Property (IP) with the focus on management and control subsystem, also participate in developing infrastructure and methodology that form the foundation of our SoCs (i.e., clocking, reset, error handling, debug, chip management and SOC chassis etc.). You will build a global understanding of how our accelerators are built from concept to production. This is a highly cross-functional role that will require you to coordinate and co-design with our software and system hardware counterparts. You will utilize, a background in RTL design, and the ability to lead to multi-faceted efforts involving many stakeholders.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving team behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits

Learn more aboutbenefits at Google (https://www.google.com/about/careers/applications/benefits/) .

Responsibilities

Work separately to create and review management and control subsystem's design microarchitecture specifications.
Develop SystemVerilog RTL to implement logic for ASIC products according to established coding and quality guidelines.
Work with architecture and power teams to evaluate features and their impact.
Work with design validation (DV) teams to create test plans to verify, and debug design RTL.
Work with physical design teams to ensure design meets physical requirements and timing closure.

Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google'sApplicant and Candidate Privacy Policy (./privacy-policy) .

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See alsoGoogle's EEO Policy (https://www.google.com/about/careers/applications/eeo/) ,Know your rights: workplace discrimination is illegal (https://careers.google.com/jobs/dist/legal/EEOC_KnowYourRights_10_20.pdf) ,Belonging at Google (https://about.google/belonging/) , andHow we hire (https://careers.google.com/how-we-hire/) .

If you have a need that requires accommodation, please let us know by completing ourAccommodations for Applicants form (https://goo.gl/forms/aBt6Pu71i1kzpLHe2) .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCP_EEO_Post.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.

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