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Manufacturing Test Engineer Co-Op
Boston Dynamics, Inc.
United States
- $32 to $37 USD / hour
In progress Bachelor's or Master's degree in Electrical Engineering, Robotics, Mechanical Engineering or a related field.
Added 1 min ago
Project Manager, Dallas
Kovach Default
TX
…Administration, Engineering, Manufacturing, and eventual delivery to the field. The ultimate responsibility will be to maximize the efficiency and profit of the project by purchasing…
Added 1 min ago
Logistics Analyst - 2nd Shift
GXO Logistics
Horn Lake, MS
Bachelor’s degree in Logistics, Business, Supply Chain or a related field, or equivalent related work or military experience
Added 1 min ago
Operations Supervisor - 2nd Shift
GXO Logistics
Horn Lake, MS
Bachelor's degree in Logistics or a related field
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Operations Supervisor - 3rd Shift
GXO Logistics
Horn Lake, MS
Bachelor's degree in Logistics or a related field
Added 1 min ago
Offensive Security Engineer, Specialist
The Vanguard Group, Inc.
Malvern, PA · Charlotte, NC · Dallas/Ft. Worth, TX
Engineer primarily in Microsoft Azure, with additional support across AWS.
Added 1 min ago
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CCSI Systems Senior Engineer
AlixPartners
NY
- $115,000 to $135,000 USD / year
The CCSI Systems Senior Engineer is a full-time role located in Southfield, MI, Chicago, IL, Dallas/Houston, TX, or New York, NY and reports to the Cloud Platform Delivery and Operations…
Added 2 mins ago
CO
Associate Signal, Lighting and ITS Engineer (Civil Engineer, Associate)
City of Seattle
Seattle, WA
- $62.32 to $72.73 USD / hour
We’re a team of problem solvers, planners, engineers, communicators, and field crews - bringing purpose-driven work to life. Now, we need passionate, innovative talent like you. Let’s build…
Added 2 mins ago
Senior Engineer, Mechanical CCE
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The Construction & Commissioning Senior Mechanical Engineer provides senior-level technical support for mechanical construction and commissioning activities across power generation…
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Associate Software Engineer
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Bachelor’s degree (in Engineering, Computer Science, Math, Physics, or related field) or equivalent related work experience
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Radar Simulation & Algorithms Engineer
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Job Title: Scientist, Radar Simulation and Algorithms Engineer
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Quality Engineer I
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Site Reliability Engineer, Apple Data Platform
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Added 3 mins ago
GC
Construction Manager
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Costa Mesa, CA
- $95,375 to $152,600 USD / year
Effectively communicate proposed design modifications and concerns to the Engineer-of-Record in a timely and professional manner;
Added 3 mins ago
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Structural Engineer
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Houston, TX
- $95,000 to $145,000 USD / year
BW Industrial Construction is seeking a full-time Structural Engineer to support industrial building construction, renovation, and facility improvement projects from our Houston office.…
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NP
Engineer I, II, III, or IV - Construction Projects
Nebraska Public Power District
Hallam, NE
- $6,837 to $12,887 USD / month
Nebraska Public Power District (NPPD) has an immediate opening for a Engineer I, II, III, or IV - Construction Projects located at Princeton Road Station in Hallam, Nebraska (approximately…
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Associate Project Engineer (Electrical)
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NC
Bachelor's Degree in Electrical Engineering or related engineering field required.
Added 3 mins ago
Associate Project Engineer (Electrical)
USICO Industrial Connections & Solutions LLC
NC
Bachelor's Degree in Electrical Engineering or related engineering field required.
Added 3 mins ago
Construction Document Coordinator
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High Point, NC
Download all documents and drawings required from General Contractor’s and Engineer’s websites (or copy from CDs when available) and file in the proper location on the EAS network
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Ongoing Reliability Engineer
Q-Edge Corporation, Foxconn
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The Reliability Engineer is a professional who specializes in laboratory reliability testing to ensure equipment, systems, and software perform without failure over their intended lifespan.…
Added 4 mins ago
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Systems Engineer -Standards/Technical Specifications – TS/SCI with CI Poly
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Degree in computer science, engineering or a related field, or equivalent practical experience.
Added 4 mins ago
CH Field Operator
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Marketing Intern (Summer 2027) - High Concrete & StructureCare
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Google

RTL Design Engineer, Google Cloud - Sunnyvale

Sunnyvale, CA, United States

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Job details

Experience: 2 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development.
Posting language: English

Original job description

In most instances, this position requires in-person interviews as part of the hiring process.

Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
2 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development.
Experience in SystemVerilog for creating microarchitecture specifications and synthesizable RTL.
Experience using Python, Tcl, or Perl for automating design tasks and data analysis.
Experience with industry-standard EDA tools for simulation, synthesis, and power analysis.

Preferred qualifications:

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
5 years of experience with high-performance ASIC design in Phase-Locked Loop, Frequency-Locked Loop, and Delay-Locked Loop integration.
Experience implementing clock skipping, Dynamic Voltage and Frequency Scaling (DVFS), and fine-grained clock gating for low-power SoC optimization.
Proficiency in Python or Perl for automating design scripts and analyzing complex clock-tree data.
Knowledge of processor design or accelerators and of high-performance and low power design techniques.
Understanding of clock distribution challenges, including jitter, skew management, and duty-cycle distortion.

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As a RTL Design Engineer, you will join a team working on SoC-level RTL design for our data center accelerators. You will design RTL IP with the focus on chassis infrastructure, including fabric bridges and sensor telemetry network, also participate in developing infrastructure and methodology that form the foundation of our SoCs (i.e., error handling, debug, chip management and SOC chassis, etc.). You will build a global understanding of how our accelerators are built from concept to production. This is a highly cross-functional role that will require you to coordinate and co-design with our software and system hardware counterparts. In this role, you will utilize a background in RTL design and lead multi-faceted efforts involving many stakeholders. The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $138000 - $197000 (USD) + 15% bonus target + equity + benefits

Learn more about benefits at Google.

Work independently to create and review clock control subsystem's design micro-architecture specifications.
Develop SystemVerilog RTL to implement logic for ASIC products according to established coding and quality guidelines.
Work with architecture and power teams to evaluate features and their impact.
Work with Design Validation (DV) teams to create test plans to verify and debug design RTL.
Work with physical design teams to ensure design meets physical requirements and timing closure.

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