Jobs in the United States

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Added 45 mins ago
Site Reliability Engineer- TS/SCI w/poly
GD Information Technology, Inc.
United States
Advance how our customers operate while you advance your career. Join GDIT as a Site Reliability Engineer tor and build an impactful career in enterprise IT, collaborating with people who…
Added 1 hour ago
Senior Systems Engineer
Anduril Industries
Costa Mesa, CA
…cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not…
Added 3 hours ago
Senior Lead Engineer - Design Verification
Altera Corporation
San Jose, CA
Altera is seeking a Senior Lead Engineer - Design Verification to provide hands-on technical leadership for the verification of next-generation FPGA, programmable SoC, and platform…
Added 3 hours ago
O
Senior Network Developer
Oracle
Seattle, WA · Nashville, TN · Redwood City, CA · Santa Clara, CA · Reston, VA
- $91,400 to $187,000 USD / year
As a Sr Network Development Engineer, you will be responsible for helping design, build, test, deploy and operate highly scalable solutions to support Oracle’s next-generation Cloud…
Added 3 hours ago
Hardware/Software Co-Design Engineer, Inference
Google
Sunnyvale, CA
…platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the…
Added 4 hours ago
ASIC Design Verification Engineer, Google TPU
Google
Sunnyvale, CA
As an ASIC Design Verification Engineer, you will use design and verification expertise to perform direct verification in active projects using problem-solving skills.
Added 5 hours ago
Platform Engineer Inter (Internship to hire)
Balanxbio
Remote, United States
BalanX Bio is seeking Platform Engineer Interns to help our Platform Engineering team support AWS infrastructure and application deployments. You will work with backend and frontend…
Added 5 hours ago
Integration Services Senior Engineer
Leidos
Pearl Harbor, HI
We are seeking a highly motivated and experienced Senior Network Engineer onsite at Ford Islan, Hawaii. In this Integration Services role, you will lead a team of engineers, perform project…
Added 6 hours ago
Process Automation Engineer
Partnered Staffing - Kelly Services
Minneapolis, MN
Our Client has an exciting and challenging opportunity for a Process Automation Engineer for their reverse osmosis and nano filtration business in Minneapolis, MN. They offers the most…
Added 6 hours ago
Data / Voice Network Engineer / Lead / Support
Saviance Technologies
Providence, RI
The Data Network engineer is responsible for providing expertise to networking infrastructure and associated project activities.
Added 6 hours ago
Technical Specialist- ASIC Functional Safety Engineer
North Star Staffing Solutions, Inc.
Farmington Hills, MI
The ASIC Functional Safety Engineer position in TRW Global Electronics Engineering reports to the Chief Engineer of the Semiconductor Core Development group, our global team responsible for…
Added 6 hours ago
(RP) ASIC Functional Safety Engineer
North Star Staffing Solutions, Inc.
Farmington, MI
The ASIC Functional Safety Engineer reports to the Chief Engineer of the Semiconductor Core Development group,a global team responsible for worldwide development of microcontroller and…
Added 6 hours ago
Principal Engineer- Airbag Safety ASIC Design
North Star Staffing Solutions, Inc.
Farmington Hills, MI
The responsibilities for a Principal Engineer in the Semiconductor Core Development team include the development of Application Specific Integrated Circuits (ASIC) and Application Specific…
Added 6 hours ago
SoC Verification Engineer
Insilico
Austin, TX
Insilico is an End-to-End specialized VLSI, Embedded Design & Software services and solutions company. It operates in the “Compute” & “Connectivity” space.
Added 6 hours ago
Pre and Post Silicon Validation Engineer
Insilico
San Diego, CA
…The Validation team works closely with architects, designers, verification engineers, software engineers, and customers. The team is currently seeking candidates who are familiar with…
Added 6 hours ago
GPU compiler test engineer
Insilico
San Diego, CA
Insilico is an End-to-End specialized VLSI, Embedded Design & Software services and solutions company. It operates in the “Compute” & “Connectivity” space.
Added 6 hours ago
Design Verification Engineer
Insilico
Irvine, CA
Senior DV engineer responsible for defining and implementing verification methodology and verifying in any of the following key areas of our next generation ASIC:
Added 6 hours ago
Senior GoLang Engineer
Insilico
Oakland, CA
Insilico is an End-to-End specialized VLSI, Embedded Design & Software services and solutions company. It operates in the “Compute” & “Connectivity” space.
Added 6 hours ago
Field Service Technician
Computech Corporation
Chicago, IL
…printers and plotters, enterprise level servers, networks and software, item processing reader/sorters and networking issues on imaging systems, medium/high complexity…
Added 6 hours ago
Hardware Engineer
Cloud Peritus
New York, NY
We are looking for a hardware engineer to join our high frequency trading technology team.
Added 6 hours ago
IP Networking Product Development/Manager (individual contributor)
Chembular Manpower
San Jose, CA
BSEE with 5 years experience in networking hardware/software product development
Added 6 hours ago
QA Automation Tester
Beta Soft System Inc.
Fremont, CA
QA Automation Engineer who is well-versed with Java Scripting language and Selenium. As a Q/A Automation Engineer, you'll be responsible for Java coding in a Selenium environment to create…
Added 6 hours ago
Principal AI Platform and Model Operations Engineer - TS/SCI with Polygraph
GD Information Technology, Inc.
United States
We are seeking a hands-on AI Platform Operations Engineer to own and mature the end-to-end platform and lifecycle mechanisms that move AI models, prompts, retrieval assets, dependencies,…
Added 7 hours ago
VI
System Test Lead
Viasat, Inc.
Carlsbad, CA · Reston, VA · Germantown, MD
- $190,500 to $285,500 USD / year
Shepherd test system deployment from hardware/software integration, to use in design verification and out to operations.
Added 8 hours ago
Pre-Silicon Signoff Lead - 19498
Synopsys
Sunnyvale, CA
…self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to…

Google

Hardware/Software Co-Design Engineer, Inference

Sunnyvale, CA, United States

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Job details

Experience: 10 years of experience in computer architecture, chip architecture, or hardware-software co-design.
Posting language: English

Original job description

In most instances, this position requires in-person interviews as part of the hiring process.

Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
10 years of experience in computer architecture, chip architecture, or hardware-software co-design.
Experience developing systems for performance modeling, simulation, or system analysis.

Preferred qualifications:

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience architecting hardware solutions or performance optimizations for ML training and inference.
Experience with deep learning frameworks such as TensorFlow or PyTorch.
Deep understanding of ML trends, business drivers, and the software ecosystem.
Ability to engage and collaborate with hardware designers, software architects, and ML researchers.

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

In this role, you will act as a key technical anchor bridging the gap between model architecture innovation and next-generation hardware design. You will operate cross-functionally across AI research and engineering, help shape the architectural roadmap for future machine learning serving and training capabilities. You will drive the integration of Machine Learning (ML) research such as the training and serving of massive foundation models with advanced silicon architectures to deliver industry-leading, high-performance, and power-efficient accelerators.The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're behind Google's groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $192000 - $278000 (USD) + 20% bonus target + equity + benefits

Learn more about benefits at Google.

Drive the definition and optimization of the hardware/software stack to enable performant training and serving of large ML models.
Collaborate with research and modeling teams to innovate on model architectures, focusing on scaling, quality, and their direct impact on hardware performance.
Lead the development of configurable architectural simulators and cycle-accurate performance models to quantify microarchitectural optimizations and evaluate architectural decisions.
Conduct system-level performance analysis across highly distributed ML systems, innovating new methodologies to balance compute, memory bandwidth, and inter-chip network requirements.
Engage with partners across hardware design, compiler development, and ML research to transition architectural innovations from concept to production.

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