Jobs in the United States

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Added 12 mins ago
AE
R&D Project Engineer
Applied Engineering
Burnsville, MN
- $48.95 to $72.22 USD / hour
Coordinate project requirements, design reviews, verification and validation activities, engineering change control, and market launch readiness
Added 12 mins ago
HA
Principal ASIC Design Engineer
Honeywell Aerospace
Plymouth, MN
- $173,000 to $200,000 USD / year
As a Principal ASIC Design Engineer at Honeywell Aerospace, you will be a technical leader in our ASIC design team, responsible for driving innovation and excellence in ASIC design, leading…
Added 18 mins ago
Sr. Staff Physical Design Engineer
Advanced Micro Devices, Inc
Austin, TX
Join an experienced physical design team working on AMD graphics IP for next-generation AI data center chips. In this role, you will own and drive complex physical design work for…
Added 30 mins ago
ASIC Design Engineer, Cloud TPU
Google
Sunnyvale, CA
Cross-functional experience with Design Verification (DV) and Physical Design (PD) teams.
Added 45 mins ago
Hardware Architecture Manager
Ford Motor Company
Dearborn, MI
…architectural path that manages complexity, enables efficient design, and lets programs move quickly without compromising…
Added 53 mins ago
Design Verification Engineer Intern (Summer 2027)
MIPS Holding Inc
TX
MIPS – A GlobalFoundries company is seeking a Design Verification Engineer Intern to join the CPU verification team in Plano, Texas. The intern will gain hands-on experience verifying…
Added 58 mins ago
IC
SoC Logic Design Engineer
Intel Corporation
CA · OR
- $105,650 to $149,150 USD / year
As a SoC Logic Design Engineer, you will actively contribute to the development, coding, and simulation of system-on-chip (SoC) designs. You will integrate logic from various IP blocks and…
Added 58 mins ago
IC
SoC Design Verification Engineer
Intel Corporation
CA
- $105,650 to $149,150 USD / year
…responsibilities will focus on performing functional logic verification, developing scalable verification plans, and executing emulation models to uncover and address design challenges.…
Added 1 hour ago
Design Engineer
Panasonic
Suwanee, GA
As a key member of the project design team, our Mechanical Design Engineer applies engineering best practices to develop and document the complete mechanical design for our projects. The…
Added 1 hour ago
Senior Principal Systems Engineer (Electromagnetic Environmental Effects (E3))
CORP-Corporate Office
United States
…programs. You'll perform technical planning, system integration, verification and validation, cost and risk assessment, and supportability and effectiveness analyses for total systems.…
Added 1 hour ago
Principal Systems Engineer (Electromagnetic Environmental Effects (E3))
CORP-Corporate Office
United States
…programs. You'll perform technical planning, system integration, verification and validation, cost and risk assessment, and supportability and effectiveness analyses for total systems.…
Added 1 hour ago
Lead Full Stack Java Engineer
Wells Fargo Bank, N. A.
CHARLOTTE, NC
Wells Fargo is seeking a highly skilled and hands-on Lead Engineer to drive the end-to-end delivery of strategic lending technology solutions supporting new product launches and feature…
Added 1 hour ago
Senior AI/ML Engineer
Ignite IT
Remote, United States
Partner with the MLOps Engineer on packaging, deployment, rollback, and post-release verification within Government-approved AWS environments.
Added 1 hour ago
Senior Systems Engineer
IESE Solutions
El Segundo, CA
IESE Solutions is seeking a Systems Engineer to support the U.S. Space Forces mission of delivering warfighter capability via the Space Systems Command (SSC) directorates. Position is…
Added 1 hour ago
Space Systems Engineer
IESE Solutions
El Segundo, CA
IESE Solutions is seeking a highly experienced Sr. Principal Space Systems Engineer to support the Space Systems Command (SSC) directorates. Position is available in El Segundo, California.
Added 1 hour ago
Systems Engineer
IESE Solutions
El Segundo, CA
Provide technical oversight of development efforts (i.e., design, development, manufacturing, assembly, integration, test, production and sustainment) whether they are traditional…
Added 1 hour ago
Senior Ground Segment Systems Engineer
IESE Solutions
El Segundo, CA
Help shape various systems architecting and engineering activities such as system requirements definition, design, interface management, data architecture development, verification and…
Added 1 hour ago
Systems Engineer
IESE Solutions
Colorado Springs, CO
Provide technical oversight of development efforts (i.e., design, development, manufacturing, assembly, integration, test, production and sustainment) whether they are traditional…
Added 1 hour ago
Senior Azure/AWS Cloud Engineer (5539)
SMX
Huntsville, AL
SMX is actively searching for a dynamic and adept Senior Azure/AWS Cloud Engineer to support our government client in Huntsville, AL.
Added 1 hour ago
Azure/AWS Cloud Engineer (5540)
SMX
Huntsville, AL
SMX is actively searching for an Azure/AWS Cloud Engineer to support our government client in Huntsville, AL.
Added 1 hour ago
ATE (Automated Test Equipment) Systems Engineer
Insight Global
Huntsville, AL
…and depot repair seeking a hands-on Automated Test Equipment Engineer to develop, integrate, troubleshoot, and sustain test systems for radar, RF, avionics, and defense electronic…
Added 1 hour ago
RF Communications Engineer
Leidos
Huntsville, AL
The Lead RF Communications Engineer will support the Leidos Space Platforms Portfolio in the development of a lunar terrain vehicle system and support equipment, primarily responsible for…
Added 1 hour ago
Mechanical Design Engineer II - New Glenn
Blue Origin LLC
Seattle, WA
Design, release, and support of engineering artifacts across the product life cycle to support hardware fabrication, assembly, verification, test and operations. Implements operating…
Added 1 hour ago
C
Senior Systems Testing Engineer
Carrier
Indianapolis, IN
- $79,000 to $158,000 USD / year
The Senior Systems Test Engineer oversees testing the embedded system to ensure it meets both system requirements and customer expectations. The Senior Systems Test Engineer owns the…
Added 1 hour ago
Principal, Mechanical SME
Hut 8
Nueces County, TX
The Mechanical Systems Expert is Managed Services' expert embedded in a data center build - supporting design review and commissioning to ensure cooling systems are operable and…

Google

ASIC Design Engineer, Cloud TPU

Sunnyvale, CA, United States

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Job details

Experience: 8 years of experience in RTL design.
Posting language: English

Original job description

In most instances, this position requires in-person interviews as part of the hiring process.

Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
8 years of experience in RTL design.
Experience with digital design and microarchitecture design.
Experience in optimizing for performance, power, and area.
Cross-functional experience with Design Verification (DV) and Physical Design (PD) teams.

Preferred qualifications:

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
10 years of RTL design experience.
4 years of experience in power optimization and experience with power analysis tools like PowerArtist and PTPX.
Experience with Linting, CDC, RDC, LEC and experience with Scripting languages (i.e. Python or Perl).
Experience optimizing RTL solutions, RTL design methodologies and automate front-end engineering flows.
Experience in design automation, architecting RTL solutions and ASIC Synthesis flows.

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

Join the team designing and developing the On-Chip Network of Google's next-generation Tensor Processing Units (TPUs), the custom-built accelerators powering our AI and machine learning workloads in datacenters. You will be responsible for the microarchitecture, design, implementation, and integration of key digital logic blocks within the TPU. Your role requires close collaboration with cross-functional teams, including Verification, Physical Design, Validation, and Firmware, to deliver cutting-edge hardware. You will own critical design deliverables, help with integration efforts, and contribute to the continuous improvement of our design methodologies and flows. As an RTL Design Engineer on the TPU team, you will be a key contributor to the development of Google's AI accelerators. You will leverage your expertise in digital logic design, computer architecture, and RTL coding to create innovative and efficient hardware solutions.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits

Learn more about benefits at Google.

Define and document the microarchitecture for digital designs within the TPU.
Partner with Verification to develop test plans and debug RTL, and collaborate with Physical Design to achieve timing, area, power, and manufacturability goals.
Drive critical power optimization and automation initiatives across all on-chip-network components and subsystems.
Support post-silicon validation and hardware debugging efforts to ensure successful deployment.
Lead the development and enhancement of internal design tools, flows, and engineering methodologies.

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More about this job

Skills

Electrical engineering
Computer engineering
Computer science
RTL
Python
Perl
ML
Collaboration
Firmware
Process improvement
Google Cloud
Research
Debugging

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