Jobs in the United States

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Added 12 mins ago
J
Power Systems Study Engineer III
Jobgether
Remote, United States
- $104,738 to $130,502.05 USD / year
…reviews and QA/QC assessments on projects where you are not the lead design engineer or power systems study specialist, ensuring accuracy and consistency across…
Added 12 mins ago
J
ICT Engineer III
Jobgether
Remote, United States
- $104,738 to $130,502.05 USD / year
Perform quality assurance and quality control (QA/QC) peer reviews for projects where you are not the lead design engineer.
Added 12 mins ago
J
Big Data Architect IT Consultant Master
Jobgether
Remote, United States
- $75 to $80 USD / hour
You will lead and coordinate technical activities throughout the data platform lifecycle, ensuring the architecture is reliable, scalable, secure, and aligned with enterprise requirements.
Added 18 mins ago
Mechanical Engineer, Satellites (Starlink)
SpaceX
Redmond, WA
As a mechanical design engineer within the satellite vehicle engineering organization you will get to solve complex structural, thermal, and electromechanical problems on the various space…
Added 23 mins ago
SG040 - Threat Engineer.
Astrion
Columbia, MD
Primary responsibility will be the lead POC for one or more programs within the Sea Based Threat Portfolio. You will operate as the face of the program through meeting attendance and…
Added 31 mins ago
IC
Senior Memory Characterization & Reliability Engineer
Intel Corporation
CA · OR
- $164,100 to $219,550 USD / year
Intel Foundry is seeking a Senior Memory Characterization & Reliability Engineer to join our Memory Technology Development organization. In this role, you will drive reliability assessment,…
Added 37 mins ago
Senior Solutions Engineer
Dossier
Remote, United States
We are hiring a Senior Solutions Engineer to own the demo and the technical win on our largest enterprise deals. This is a true pre-sales role: you partner with our Enterprise Account…
Added 37 mins ago
M
Process Engineer
MacLean-Fogg
Farmington Hills, MI
- $75,000 to $85,000 USD / year
MacLean-Fogg is seeking a Process Engineer for our Farmington Hills, MI manufacturing facility. In this role, you'll optimize manufacturing processes, troubleshoot equipment and process…
Added 44 mins ago
J
Senior TypeScript Backend Engineer
Jobgether
Remote, United States
- $50 to $90 USD / hour
…steps. Our partner is looking for a Senior TypeScript Backend Engineer based in the United…
Added 44 mins ago
Senior SimCorp GAIN Engineer
Jobgether
Remote, United States
This position is listed on behalf of a partner company, who manages all applications and next steps. Our partner is looking for a SimCorp GAIN Technical Lead based in the United States.
Added 44 mins ago
J
Principal Resource Adequacy Planning Engineer
Jobgether
Remote, United States
- $175,325 to $199,225 USD / year
…Western Interconnection. As Principal Resource Adequacy Planning Engineer, you will lead advanced probabilistic resource adequacy studies and provide technical guidance on critical planning…
Added 44 mins ago
J
Principal Power Systems Engineer – Grid Integration & Power Electronics
Jobgether
Remote, United States
- $175,000 to $215,000 USD / year
As a Principal Power Systems Engineer, you will provide senior technical leadership on complex grid integration and power systems projects across North America. You will lead critical…
Added 44 mins ago
Lead Solutions Engineer
Jobgether
Remote, United States
This position is listed on behalf of a partner company, who manages all applications and next steps. Our partner is looking for a Lead Solutions Engineer based in the United States.
Added 45 mins ago
Space Lasers Engineer, Satellites (Starlink)
SpaceX
Redmond, WA
As a SpaceX optical engineer, you will be responsible for free-space optical system design, validation, and operation. You will shape the future of laser communication systems and directly…
Added 45 mins ago
Optical Engineer, Satellites (Starlink)
SpaceX
Redmond, WA
As a SpaceX optical engineer, you will be responsible for free-space optical system design, validation, and operation. You will shape the future of laser communication systems and directly…
Added 45 mins ago
Mechanical Engineer - Satellite Payload (Starlink)
SpaceX
Redmond, WA
MECHANICAL ENGINEER, SATELLITE PAYLOAD (STARLINK)
Added 45 mins ago
Mechanical Engineer, Satellite Harnessing (Starlink)
SpaceX
Redmond, WA
As an Avionics Design Engineer on the Starlink team, you will own harness design from concept and component selection, through to production, qualification, and system integration. This…
Added 45 mins ago
Harness Design Engineer, Satellites (Starlink)
SpaceX
Redmond, WA
As an Harness Design Engineer on the Starlink team, you will own harness design from concept and component selection, through to production, qualification, and system integration. This…
Added 45 mins ago
Principal DFT Engineer
SiTime Corporation
United States
SiTime is seeking a seasoned Principal DFT Engineer to lead the DFT architecture, implementation, verification, and signoff of complex digital blocks and subsystems. The successful…
Added 50 mins ago
C
Plant Engineer III
Calpine
Mohave Valley, AZ
- $109,779.21 to $139,968.5 USD / year
…technical support for daily operations, plant improvements, process improvements, design, equipment acquisition, plant breakdown and analysis, and recommending corrective actions. Ensures…
Added 50 mins ago
NG
2027 Structural Engineer Intern - Gilbert AZ
Northrop Grumman
Gilbert, AZ
- $18.5 to $41.5 USD / hour
Participate in/lead analysis group continuous improvement and training efforts
Added 50 mins ago
Program Manager 2 – Antares 330/Eclipse Program
Northrop Grumman
Chandler, AZ
Conduct thorough risk & opportunity management practices including identification, mitigation and realization in collaboration with the program chief engineer.
Added 50 mins ago
Senior Data Engineer
Consumer Cellular
Scottsdale, AZ
Act as a technical expert and engineer on an agile squad.
Added 51 mins ago
Senior Quality Systems Specialist
Medtronic
Tempe, AZ
…growth and cross-functional collaboration as we work together to engineer the…
Added 51 mins ago
Principal GPS Subsystem Engineer
RTX Corporation
tucson, AZ
The Guidance Electronics Team is searching for a Principal GPS Subsystems Engineer with experience in GPS technology. The role of the GPS Subsystems Engineer is to provide GPS electronics…

Closed listing

Cisco

Distinguished Hardware Engineer

San Jose, CA, United States

This opening has closed.

The original listing is kept below for reference.

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Job details

Posting language: English
Posted: Nov 2, 2026

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Original job description

Archived listing. The details below describe a past opening.

The application window is expected to close on: 11/05/2026Meet the Team

The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms - like Silicon One - are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development - from design to qualification to production - is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

Your Impact

As a Distinguished Engineer, you will serve as a technical visionary and advisor to Cisco’s engineering business and senior management. You will lead and influence key industry boards, councils, and standards bodies, define and drive the adoption of next-generation technologies, and guide the development of new products and processes. Your expertise will have a broad impact across Cisco’s product portfolio, shaping strategy, research, open-source efforts, and intellectual property development. You will:

Drive the long-term technical vision and roadmap for next-generation semiconductor nodes and emerging Angstrom technologies.
Strategic Planning: Lead Technology pathfinding and process-design interactions to evaluate futuristic capabilities and quantify technical risks.
Risk Management: Drive strategic technology selection and architectural governance under uncertainty to ensure long-tern product viability.
Bridge the gap between device physics, architecture, and physical implementation to maximize system efficiency.
DTCO Leadership: Pioneer Design-Technology Co-Optimization (DTCO) methodologies to acheive breakthrough gains in Performance, Power, Area, and Cost (PPAC).
Advanced Packaging: Architect next Generation 2.5D/3D heterogeneous integration strategies, resolving complex thermal, power, delivery, and signal integrity challenges for large sale AI and networking systems.
Influence the external semiconductor and EDA ecosystem to accelerate Cisco's development cycles.
EDA Partnership: Collaborate with top-tier EDA vendors to influence tool architecture and co-develop next generation physical design flows for extreme-scale ASICs.
Foundry Interlock: Serve as a Primary technical authority in engagements with leading foundries and IP suppliers to steer PDK definitions and silicon rule decks.
Flow Convergence: Drive the convergence of custom and automated Place and Route (P&R) flows to close the performance gap in semi-custom digital architectures.
Balance aggressive technical targets with business realities and cultivate engineering excellence.
TCO Governance: Provide holistic governance balancing microarchitectural performance against manufacturability, yield and Total Cost of Ownership (TCO).
Technical Mentorship: evaluate the global Silicon One engineering organization by mentoring principal engineers and technical leads to foster a culture of innovation.
Cross-Functional Partnership: Partner with senior leadership across Architecture, Physical Design, Package and Silicon Operations, as well as external industry standards bodies.

Minimum Qualifications

Bachelors in Electrical Engineering, Computer Engineering, Microelectronics, Materials Science, or related technical field + 17 years of advanced ASIC/SoC silicon design and physical implementation experience or Masters + 14 years of related experience, or PhD + 10 years of related experience.
Experience with technical leadership at the Fellow, Distinguished Engineer, or Chief Architect level, with multi-generation tapeout successes on cutting-edge process nodes (sub-5nm, 3nm, 2nm, or GAA architectures).
Experience in Design-Technology Co-Optimization (DTCO), transistor/device physics interactions, standard cell library architecture, and standard memory/SRAM optimization for extreme-scale ASICs.
Experience with hands-on and architectural design across full-chip physical design flows, including synthesis, automated Place & Route (Innovus / Fusion Compiler), static timing analysis (PrimeTime / Tempus), clock tree/mesh synthesis, and power/IR-drop analysis (RedHawk / Voltus).
Experience defining or implementing advanced 2.5D (interposer/UCIe/D2D) and 3D heterogeneous packaging architectures, including power integrity and thermal envelope management.
Technical leadership experience with major semiconductor foundries (e.g., TSMC, IFS, Samsung) and tier-1 EDA software vendors, driving PDK enhancements and tool capability roadmaps.

Preferred Qualifications

Ph.D. in Electrical Engineering, Solid-State Physics, or Microelectronics with extensive industry recognition, including published papers in leading technical conferences (IEDM, VLSI, DAC, ISSCC) and an extensive patent portfolio in silicon design and semiconductor methodology.
Direct experience architecting baseline process-design interactions and foundational design methodologies for industry-defining process nodes (e.g., 14A, 10A, A14, sub-2nm Angstrom nodes).
Demonstrated track record of innovating and deploying automated P&R flows on high-performance custom/semi-custom architectures to bridge the performance gap between full-custom and standard ASIC design.
Demonstrated ability to make pivotal silicon architectural decisions with incomplete early data (e.g., evaluating and committing to Gate-All-Around / RibbonFET architectures 2–3 years ahead of silicon fab runs).
Experience evaluating engineering choices against Total Cost of Ownership (TCO), silicon manufacturability, yield economics, and system-level platform constraints.
Prior experience guiding engineering leaders through significant technical and product challenges.
Exceptional verbal and written communication skills with proven ability to distill complex semiconductor physics and architectural trade-offs into actionable technical strategy for executive stakeholders.

Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you.

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $284,700.00 to $390,900.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
Additional paid time away may be requested to deal with critical or emergency issues for family members
Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

.75% of incentive target for each 1% of revenue attainment up to 50% of quota;
1.5% of incentive target for each 1% of attainment between 50% and 75%;
1% of incentive target for each 1% of attainment between 75% and 100%; and
Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

$284,700.00 - $449,500.00

Non-Metro New York state & Washington state:

$272,000.00 - $398,000.00

For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. ** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

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