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Added 9 mins ago
Data Platform Engineer (Army Vantage) - Clearance Required
LMI
United States
LMI is seeking a skilled Data Platform Engineer to join our team and contribute to developing innovative software programs that support activities for the Army Materiel Command and Army’s…
Added 11 mins ago
Principal / Sr. Principal Software Engineer - Onsite Customer Integration
Northrop Grumman
MD · Melbourne, FL · Melbourne
Northrop Grumman Aeronautics Systems Sector has an opening for a Principal / Sr. Principal Software Engineer - Onsite Customer Integration to join Global Surveillance Division supporting…
Added 11 mins ago
Principal Engineer Software
Northrop Grumman
Orlando, FL · Orlando
The Principal Software Engineer will be responsible for supporting the CHORD software development and integration into tactical platforms.
Added 11 mins ago
Principal Engineer/Sr. Principal Engineer Digital-RF Subsystems I&T Lead
Northrop Grumman
Baltimore, MD · Baltimore
Control architectures and control design/integration for hardware with firmware, embedded software, and ASICs
Added 12 mins ago
Principal Engineer Software (AHT)
Northrop Grumman
Wright-Patterson AFB, OH · Wright-Patterson AFB
Northrop Grumman Defense Systems (NGDS), Beavercreek Ohio, is seeking a Full Stack Software Engineer. Successful candidates will demonstrate a broad skill set balanced between interpersonal…
Added 12 mins ago
Principal/Sr. Principal FPGA Engineer
Northrop Grumman
Rolling Meadows, IL · Rolling Meadows
As a Principal / Sr. Principal FPGA Design Engineer, you will join a diverse, high-performing team responsible for the end-to-end development of advanced RF and EO/IR products. You will…
Added 12 mins ago
Engineer/Principal Engineer (Level 2/3)
Northrop Grumman
Redondo Beach, CA · Redondo Beach
…CA is looking for an experienced, hard-working, and reliable Engineer/Principal Engineer (Level 2/3) to join our diverse team. We support all areas and phases of air and space builds from…
Added 13 mins ago
2027 Associate Systems Engineer - San Diego CA
Northrop Grumman
San Diego, CA · San Diego
Supporting technical planning, system integration, verification and validation, cost and risk, and supportability and effectiveness analyses for total systems. Analyses may be performed at…
Added 13 mins ago
Software Engineer/Principal Software Engineer - Java
Northrop Grumman
San Diego, CA · San Diego
Northrop Grumman Aeronautics Systems is looking to add a Software Engineer - Java or Principal Software Engineer - Java to join our team on site in Rancho Bernardo, CA
Added 13 mins ago
Systems Engineer - R&V (Principal or Senior Principal)
Northrop Grumman
San Diego, CA · San Diego
Conduct formal integration and support capabilities based system level testing of fully integrated complex software and hardware subsystems
Added 13 mins ago
Principal Engineer Electrical
Northrop Grumman
Chandler, AZ · Chandler
The Principal Engineer Electrical - Level 3 supports program analyses and testing of Ionizing radiation effects on electronics systems. Examples include x-ray and/or electromagnetic…
Added 13 mins ago
Principal/Controls Engineer - Level 2 or 3
Northrop Grumman
Corinne, UT · Corinne
Northrop Grumman, Space Systems, is currently seeking a Principal/ Energetics Manufacturing Engineer - Level 2/3 also known as Controls Engineer - 2/3 to support our Tooling and Facilities…
Added 16 mins ago
Principal Mechanical Engineer/Sr. Principal Mechanical Engineer - 19671*
Northrop Grumman
Roy, UT · Roy
…multi-disciplinary engineering environment consisting of Systems, Software, Design, Compliance, and Hardware engineers. This position can be tailored to both Principal Engineer and Sr.…
Added 18 mins ago
Staff SW Engineer - Performance Engineering
Visa U.S.A. Inc.
Austin, TX
As a Software Engineer on the Risk and Security team, will design and develop our services for customers in an agile environment. Collaborating with supportive and challenging colleagues,…
Added 19 mins ago
AI Engineer
Micron Technology
Boise, ID · Boise
We are seeking an early-career Full-Stack AI Engineer to help design, develop, and deploy AI-powered applications that support Micron’s Autonomous Operations initiatives. This role offers…
Added 19 mins ago
Intern - System Engineer, HBM
Micron Technology
Boise, ID · Boise
Validate hardware, firmware, and software products through testing, debugging, and cross-functional integration.
Added 23 mins ago
TT
Product Engineer, Mid-Senior
True Talent Solutions Partners
New York, NY
- $140,000 to $200,000 USD / year
Join the product engineering team at a Series A B2B workforce technology company, building software for industrial staffing and operations. You will apply AI agents and frontier models to…
Added 23 mins ago
Senior Ground Software Engineer, Top Secret Clearance
K2 Space
Los Angeles, CA
As a Senior Software Engineer on our Ground Software team, you are responsible for creating the software that is used to build, test, and fly our satellites and customer payloads. You will…
Added 23 mins ago
Ground Software Engineer, Top Secret Clearance
K2 Space
Los Angeles, CA
As a Software Engineer on our Ground Software team, you are responsible for creating the software that is used to build, test, and fly our satellites and customer payloads. You will build…
Added 26 mins ago
K
Senior AI Software Engineer - Kiewit Infrastructure Engineers
Kiewit
OR · Lone Tree, CO
- $130,000 to $150,000 USD / year
…complex workflows. We are looking for an experienced Senior Software Engineer who has strong development skills, a passion for quality and wants to build engineering solutions that make a…
Added 29 mins ago
KC
Civil Project Engineer
KPFF Consulting Engineers
Denver, CO
- $90,000 to $115,000 USD / year
…generous benefits, and a collaborative approach to work-life…
Added 29 mins ago
KC
Civil Designer
KPFF Consulting Engineers
Denver, CO
- $90,000 to $115,000 USD / year
…generous benefits, and a collaborative approach to work-life…
Added 35 mins ago
Staff/Principal AI Transformation Engineer
DiDi Labs
San Jose, CA · Mountain View, CA
We are seeking a visionary, highly technical, and mission-driven Staff or Principal AI Transformation Engineer to act as the ultimate catalyst for our company-wide AI transformation. In…
Added 43 mins ago
Software Engineer
Intuitive
Sunnyvale, CA
This role reports to the DV5 Software Release Manager and works collaboratively with a cross-functional team to implement software and processes for build and release, continuous…
Added 43 mins ago
Modeling and Simulation Software Engineer
LEIDOS, INC.
Beavercreek, OH
Leidos is hiring a Modeling and Simulation Engineer with an active Secret clearance in our Beavercreek Ohio Office. The successful candidate will use strong technical capabilities and…

Cisco Systems, Inc.

Distinguished Hardware Engineer

San Jose, CA, United States

Apply About employer

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Job details

Apply by: Nov 6, 2026
Posting language: English
Posted: Nov 2, 2026

Original job description

The application window is expected to close on: 11/05/2026Meet the Team

The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms - like Silicon One - are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development - from design to qualification to production - is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

Your Impact

As a Distinguished Engineer, you will serve as a technical visionary and advisor to Cisco’s engineering business and senior management. You will lead and influence key industry boards, councils, and standards bodies, define and drive the adoption of next-generation technologies, and guide the development of new products and processes. Your expertise will have a broad impact across Cisco’s product portfolio, shaping strategy, research, open-source efforts, and intellectual property development. You will:

Drive the long-term technical vision and roadmap for next-generation semiconductor nodes and emerging Angstrom technologies.
Strategic Planning: Lead Technology pathfinding and process-design interactions to evaluate futuristic capabilities and quantify technical risks.
Risk Management: Drive strategic technology selection and architectural governance under uncertainty to ensure long-tern product viability.
Bridge the gap between device physics, architecture, and physical implementation to maximize system efficiency.
DTCO Leadership: Pioneer Design-Technology Co-Optimization (DTCO) methodologies to acheive breakthrough gains in Performance, Power, Area, and Cost (PPAC).
Advanced Packaging: Architect next Generation 2.5D/3D heterogeneous integration strategies, resolving complex thermal, power, delivery, and signal integrity challenges for large sale AI and networking systems.
Influence the external semiconductor and EDA ecosystem to accelerate Cisco's development cycles.
EDA Partnership: Collaborate with top-tier EDA vendors to influence tool architecture and co-develop next generation physical design flows for extreme-scale ASICs.
Foundry Interlock: Serve as a Primary technical authority in engagements with leading foundries and IP suppliers to steer PDK definitions and silicon rule decks.
Flow Convergence: Drive the convergence of custom and automated Place and Route (P&R) flows to close the performance gap in semi-custom digital architectures.
Balance aggressive technical targets with business realities and cultivate engineering excellence.
TCO Governance: Provide holistic governance balancing microarchitectural performance against manufacturability, yield and Total Cost of Ownership (TCO).
Technical Mentorship: evaluate the global Silicon One engineering organization by mentoring principal engineers and technical leads to foster a culture of innovation.
Cross-Functional Partnership: Partner with senior leadership across Architecture, Physical Design, Package and Silicon Operations, as well as external industry standards bodies.

Minimum Qualifications

Bachelors in Electrical Engineering, Computer Engineering, Microelectronics, Materials Science, or related technical field + 17 years of advanced ASIC/SoC silicon design and physical implementation experience or Masters + 14 years of related experience, or PhD + 10 years of related experience.
Experience with technical leadership at the Fellow, Distinguished Engineer, or Chief Architect level, with multi-generation tapeout successes on cutting-edge process nodes (sub-5nm, 3nm, 2nm, or GAA architectures).
Experience in Design-Technology Co-Optimization (DTCO), transistor/device physics interactions, standard cell library architecture, and standard memory/SRAM optimization for extreme-scale ASICs.
Experience with hands-on and architectural design across full-chip physical design flows, including synthesis, automated Place & Route (Innovus / Fusion Compiler), static timing analysis (PrimeTime / Tempus), clock tree/mesh synthesis, and power/IR-drop analysis (RedHawk / Voltus).
Experience defining or implementing advanced 2.5D (interposer/UCIe/D2D) and 3D heterogeneous packaging architectures, including power integrity and thermal envelope management.
Technical leadership experience with major semiconductor foundries (e.g., TSMC, IFS, Samsung) and tier-1 EDA software vendors, driving PDK enhancements and tool capability roadmaps.

Preferred Qualifications

Ph.D. in Electrical Engineering, Solid-State Physics, or Microelectronics with extensive industry recognition, including published papers in leading technical conferences (IEDM, VLSI, DAC, ISSCC) and an extensive patent portfolio in silicon design and semiconductor methodology.
Direct experience architecting baseline process-design interactions and foundational design methodologies for industry-defining process nodes (e.g., 14A, 10A, A14, sub-2nm Angstrom nodes).
Demonstrated track record of innovating and deploying automated P&R flows on high-performance custom/semi-custom architectures to bridge the performance gap between full-custom and standard ASIC design.
Demonstrated ability to make pivotal silicon architectural decisions with incomplete early data (e.g., evaluating and committing to Gate-All-Around / RibbonFET architectures 2–3 years ahead of silicon fab runs).
Experience evaluating engineering choices against Total Cost of Ownership (TCO), silicon manufacturability, yield economics, and system-level platform constraints.
Prior experience guiding engineering leaders through significant technical and product challenges.
Exceptional verbal and written communication skills with proven ability to distill complex semiconductor physics and architectural trade-offs into actionable technical strategy for executive stakeholders.

Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you.

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $284,700.00 to $390,900.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
Additional paid time away may be requested to deal with critical or emergency issues for family members
Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

.75% of incentive target for each 1% of revenue attainment up to 50% of quota;
1.5% of incentive target for each 1% of attainment between 50% and 75%;
1% of incentive target for each 1% of attainment between 75% and 100%; and
Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

$284,700.00 - $449,500.00

Non-Metro New York state & Washington state:

$272,000.00 - $398,000.00

For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. ** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

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More about this job

Skills

Research
Strategic planning
Design process
Risk management
Leadership
Packaging
EDA
Place-and-route
Coaching
Electrical engineering
Computer engineering
Microelectronics
Materials science
Architectural design
Route
Communication skills
Create solutions to problems
Work as a team
Sales

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