Jobs in the United States

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Added 3 mins ago
CO
Fire Marshal
City of Henderson
Henderson, NV
- $118,374.32 to $177,561.48 USD / year
Added 3 mins ago
Quality Engineer Associate
M.C. Dean, Inc
Manassas, VA
…Tysons, Virginia and employs more than 9,000 professionals who engineer and deploy automated, secure, and resilient power and technology systems; and deliver the management platforms…
Added 3 mins ago
Project Engineer, Senior
M.C. Dean, Inc
Atlanta, GA
…Tysons, Virginia and employs more than 9,000 professionals who engineer and deploy automated, secure, and resilient power and technology systems; and deliver the management platforms…
Added 3 mins ago
Industrial Engineer 1- Lead Materials Engineer 1
GE Vernova International LLC
United States
…devices Own Kanban & PFEP (plan for every part) standard and process for areas of…
Added 11 mins ago
Business Intelligence Engineer, SSP Analytics, Seller Success Programs Analytics
Amazon.com Services LLC
Seattle, WA
As a Business Intelligence Engineer (BIE) on the Seller Success Programs Analytics team, you will be responsible for bringing data to the table, specifically seller anecdotes and business…
Added 11 mins ago
Software Development Engineer, AWS EC2 Nitro Team
Amazon Development Center U.S., Inc.
Santa Clara, CA
We are looking for an experienced software engineer to drive development for new EC2 Machine Learning platforms. In this role, the engineer will work with a broad group of technical teams…
Added 11 mins ago
Software Development Engineer, AWS EC2 Nitro Team
Amazon Development Center U.S., Inc.
Santa Clara, CA
We are looking for an experienced software engineer to drive development for new EC2 Machine Learning platforms. In this role, the engineer will work with a broad group of technical teams…
Added 11 mins ago
Software Development Engineer, AWS EC2 Nitro Team
Amazon Web Services, Inc.
Santa Clara, CA
We are looking for an experienced software engineer to drive development for new EC2 Machine Learning platforms. In this role, the engineer will work with a broad group of technical teams…
Added 11 mins ago
Software Development Engineer, AWS EC2 Nitro Team
Amazon.com Services LLC
Santa Clara, CA
We are looking for an experienced software engineer to drive development for new EC2 Machine Learning platforms. In this role, the engineer will work with a broad group of technical teams…
Added 12 mins ago
Data Platform Engineer (Army Vantage) - Clearance Required
LMI
United States
LMI is seeking a skilled Data Platform Engineer to join our team and contribute to developing innovative software programs that support activities for the Army Materiel Command and Army’s…
Added 15 mins ago
Manufacturing Engineer 2/3
Northrop Grumman
Rocket Center, WV · Rocket Center
The process engineer develops and oversees manufacturing processes based on design requirements. The candidate will develop and maintain detailed work instructions for assigned…
Added 15 mins ago
Acoustic Analyst level 2/3
Northrop Grumman
Sunnyvale, CA · Sunnyvale
Basic Qualifications for Principal Engineer Level 3:
Added 15 mins ago
Noise Vibration and Harshness Engineer Level 2/3
Northrop Grumman
Sunnyvale, CA · Sunnyvale
Northrop Grumman Mission Systems is seeking an Noise Vibration and Harshness Engineer Level 2/3 with thermodynamics, heat transfer and fluid flow knowledge for the development and ongoing…
Added 16 mins ago
Guidance Navigation Control Engineer - 20429*
Northrop Grumman
Manhattan Beach, CA · Manhattan Beach
Northrop Grumman Defense Systems is seeking Guidance Navigation Control Engineer. This position will be located in Manhattan Beach, CA and will support GSSC.
Added 16 mins ago
Principal Guidance Navigation Control Engineer - 20430*
Northrop Grumman
Manhattan Beach, CA · Manhattan Beach
Northrop Grumman Defense Systems is seeking Principal Guidance Navigation Control Engineer - 20430. This position will be located in Manhattan Beach, CA and will support GSSC.
Added 16 mins ago
Software Engineer/Principal Software Engineer - Java
Northrop Grumman
San Diego, CA · San Diego
Northrop Grumman Aeronautics Systems is looking to add a Software Engineer - Java or Principal Software Engineer - Java to join our team on site in Rancho Bernardo, CA
Added 16 mins ago
Principal/Controls Engineer - Level 2 or 3
Northrop Grumman
Corinne, UT · Corinne
Northrop Grumman, Space Systems, is currently seeking a Principal/ Energetics Manufacturing Engineer - Level 2/3 also known as Controls Engineer - 2/3 to support our Tooling and Facilities…
Added 18 mins ago
Software Engineer II
Chewy
Minneapolis, MN
We are hiring a Software Engineer II to join the Fulfillment Execution Application team in Minneapolis, MN. At Chewy, it is our mission to be the most trusted and convenient destination for…
Added 19 mins ago
Principal Embedded Software Engineer-17488
Northrop Grumman
Roy, UT · Roy
Northrop Grumman Defense Systems is seeking a Principal Embedded Software Engineer for the Flight / Guidance Navigation & Control (GN&C) Software Team. This position will be located in Roy,…
Added 19 mins ago
Sentinel Administrative Assistant 3 - 19893
Northrop Grumman
Roy, UT · Roy
…operational support to the Chief of Staff for the Office of Chief Engineer and the broader leadership team. This role manages complex calendars, coordinates senior-level meetings and…
Added 19 mins ago
2027 Associate Supplier Quality Engineer / Supplier Quality Engineer - Utah
Northrop Grumman
Corinne, UT · Clearfield, UT · Magna, UT · Salt Lake City, UT · Corinne · Clearfield · Magna · Salt Lake City
Northrop Grumman Space Systems is currently seeking an Associate and/or Supplier Quality Engineer. The qualified candidate will become part of Northrop Grumman’s Safety & Mission Assurance…
Added 20 mins ago
Senior Engineer - Firmware Engineer
MSI - (Marvell Semiconductor Inc.) US
Santa Clara, CA
…look forward to sharing more with you during the interview…
Added 21 mins ago
Staff SW Engineer - Performance Engineering
Visa U.S.A. Inc.
Austin, TX
As a Software Engineer on the Risk and Security team, will design and develop our services for customers in an agile environment. Collaborating with supportive and challenging colleagues,…
Added 22 mins ago
MT
Dry System Mechanical Engineer
Micron Technology
Clay, NY · Clay
- $82,000 to $139,000 USD / year
As a Dry System Mechanical Engineer, you will play a key role in delivering critical facility systems that support semiconductor manufacturing operations. You will provide technical…
Added 22 mins ago
MT
PCS Engineer
Micron Technology
Manassas, VA · Manassas
- $74,000 to $145,000 USD / year
As a FDC (Fault Detection Control) Engineer at Micron Technology, Inc. in Manassas, VA you will support the manufacturing areas with development and implementation of FDC solutions to…

Cisco Systems, Inc.

Distinguished Hardware Engineer

San Jose, CA, United States

Apply About employer

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Job details

Apply by: Nov 6, 2026
Posting language: English
Posted: Nov 2, 2026

Original job description

The application window is expected to close on: 11/05/2026Meet the Team

The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms - like Silicon One - are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development - from design to qualification to production - is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

Your Impact

As a Distinguished Engineer, you will serve as a technical visionary and advisor to Cisco’s engineering business and senior management. You will lead and influence key industry boards, councils, and standards bodies, define and drive the adoption of next-generation technologies, and guide the development of new products and processes. Your expertise will have a broad impact across Cisco’s product portfolio, shaping strategy, research, open-source efforts, and intellectual property development. You will:

Drive the long-term technical vision and roadmap for next-generation semiconductor nodes and emerging Angstrom technologies.
Strategic Planning: Lead Technology pathfinding and process-design interactions to evaluate futuristic capabilities and quantify technical risks.
Risk Management: Drive strategic technology selection and architectural governance under uncertainty to ensure long-tern product viability.
Bridge the gap between device physics, architecture, and physical implementation to maximize system efficiency.
DTCO Leadership: Pioneer Design-Technology Co-Optimization (DTCO) methodologies to acheive breakthrough gains in Performance, Power, Area, and Cost (PPAC).
Advanced Packaging: Architect next Generation 2.5D/3D heterogeneous integration strategies, resolving complex thermal, power, delivery, and signal integrity challenges for large sale AI and networking systems.
Influence the external semiconductor and EDA ecosystem to accelerate Cisco's development cycles.
EDA Partnership: Collaborate with top-tier EDA vendors to influence tool architecture and co-develop next generation physical design flows for extreme-scale ASICs.
Foundry Interlock: Serve as a Primary technical authority in engagements with leading foundries and IP suppliers to steer PDK definitions and silicon rule decks.
Flow Convergence: Drive the convergence of custom and automated Place and Route (P&R) flows to close the performance gap in semi-custom digital architectures.
Balance aggressive technical targets with business realities and cultivate engineering excellence.
TCO Governance: Provide holistic governance balancing microarchitectural performance against manufacturability, yield and Total Cost of Ownership (TCO).
Technical Mentorship: evaluate the global Silicon One engineering organization by mentoring principal engineers and technical leads to foster a culture of innovation.
Cross-Functional Partnership: Partner with senior leadership across Architecture, Physical Design, Package and Silicon Operations, as well as external industry standards bodies.

Minimum Qualifications

Bachelors in Electrical Engineering, Computer Engineering, Microelectronics, Materials Science, or related technical field + 17 years of advanced ASIC/SoC silicon design and physical implementation experience or Masters + 14 years of related experience, or PhD + 10 years of related experience.
Experience with technical leadership at the Fellow, Distinguished Engineer, or Chief Architect level, with multi-generation tapeout successes on cutting-edge process nodes (sub-5nm, 3nm, 2nm, or GAA architectures).
Experience in Design-Technology Co-Optimization (DTCO), transistor/device physics interactions, standard cell library architecture, and standard memory/SRAM optimization for extreme-scale ASICs.
Experience with hands-on and architectural design across full-chip physical design flows, including synthesis, automated Place & Route (Innovus / Fusion Compiler), static timing analysis (PrimeTime / Tempus), clock tree/mesh synthesis, and power/IR-drop analysis (RedHawk / Voltus).
Experience defining or implementing advanced 2.5D (interposer/UCIe/D2D) and 3D heterogeneous packaging architectures, including power integrity and thermal envelope management.
Technical leadership experience with major semiconductor foundries (e.g., TSMC, IFS, Samsung) and tier-1 EDA software vendors, driving PDK enhancements and tool capability roadmaps.

Preferred Qualifications

Ph.D. in Electrical Engineering, Solid-State Physics, or Microelectronics with extensive industry recognition, including published papers in leading technical conferences (IEDM, VLSI, DAC, ISSCC) and an extensive patent portfolio in silicon design and semiconductor methodology.
Direct experience architecting baseline process-design interactions and foundational design methodologies for industry-defining process nodes (e.g., 14A, 10A, A14, sub-2nm Angstrom nodes).
Demonstrated track record of innovating and deploying automated P&R flows on high-performance custom/semi-custom architectures to bridge the performance gap between full-custom and standard ASIC design.
Demonstrated ability to make pivotal silicon architectural decisions with incomplete early data (e.g., evaluating and committing to Gate-All-Around / RibbonFET architectures 2–3 years ahead of silicon fab runs).
Experience evaluating engineering choices against Total Cost of Ownership (TCO), silicon manufacturability, yield economics, and system-level platform constraints.
Prior experience guiding engineering leaders through significant technical and product challenges.
Exceptional verbal and written communication skills with proven ability to distill complex semiconductor physics and architectural trade-offs into actionable technical strategy for executive stakeholders.

Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you.

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $284,700.00 to $390,900.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
Additional paid time away may be requested to deal with critical or emergency issues for family members
Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

.75% of incentive target for each 1% of revenue attainment up to 50% of quota;
1.5% of incentive target for each 1% of attainment between 50% and 75%;
1% of incentive target for each 1% of attainment between 75% and 100%; and
Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

$284,700.00 - $449,500.00

Non-Metro New York state & Washington state:

$272,000.00 - $398,000.00

For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. ** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

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More about this job

Skills

Research
Strategic planning
Design process
Risk management
Leadership
Packaging
EDA
Place-and-route
Coaching
Electrical engineering
Computer engineering
Microelectronics
Materials science
Architectural design
Route
Communication skills
Create solutions to problems
Work as a team
Sales

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