ASIC Technical Lead Engineer
- San Diego, CA, United States
$220,000 USD / year
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Job details
- Pay
- $220,000 USD / year
- Apply by
- Experience
- 5+ years of ASIC or SoC experience, including at least one chip taken from concept through silicon
- Posting language
- English
- Posted
Original job description
ASIC Technical Lead | Neurotech / BCI | San Diego, CA (Onsite)
I’m partnering with a venture-backed neurotechnology company developing an implantable brain-computer interface for people with severe paralysis. The company is in clinical trials and is now scaling a San Diego R&D team to build its next-generation platform.
They need an experienced ASIC engineer to serve as the technical owner of a custom neural recording chip. A specialist IC design firm handles the design execution. This person is the company’s in-house expert who makes sure the chip is right.
WHAT THE JOB IS
You won’t be designing the chip yourself. You’ll define what it needs to do, scrutinize the partner’s work at every stage, and decide when it’s ready for fabrication. When silicon comes back, you’ll lead the effort to confirm it performs as intended and get to the bottom of anything that doesn’t.
RESPONSIBILITIES
Write and maintain the chip requirements and specification, with full traceability Lead technical reviews with the design partner from architecture through final sign-off, digging into the underlying schematics and simulation data Evaluate simulation, physical verification and design-for-test work, and own the decision to proceed to fabrication Identify and manage technical risks such as noise, power, matching and process variation across a large channel count Work with the in-house test engineer on silicon bring-up and characterization, and lead debug when issues come up Drive any required design revisions and the plan to re-verify them Support the chip through qualification and production, and define requirements for future generations
QUALIFICATIONS
BS or MS in Electrical Engineering or related field, with a focus on IC design 5+ years of ASIC or SoC experience, including at least one chip taken from concept through silicon An analog or mixed-signal IC design or verification background Experience reviewing simulation results (SPICE/Cadence), physical verification (DRC/LVS) and DFT Experience managing an outside design partner, foundry or fab Bonus: medical device experience (design controls, FDA submissions) or implantable electronics
WHY CONSIDER IT
Early role on a next-generation BCI program High-impact technical ownership of a novel neural recording chip A growing San Diego team working on technology that restores function for patients