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Confluent - Senior Product Manager I - Cloud Gross Margin & Global Expansion
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Apple

Design Verification Engineer

Cupertino, CA, United States

$174,149 to $225,300 USD / year

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Job details

Pay: $174,149 to $225,300 USD / year
Working hours: 40 hours/week
Posting language: English
Posted: Nov 5, 2026

Original job description

Summary Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Review design and architecture specifications in detail to ensure alignment with functional and performance goals. Collaborate closely with design and micro-architecture teams to understand design requirements, constraints, and real-world use cases. Develop comprehensive test plans, test cases, and coverage plans to validate the functionality and performance of the chip design. Refine and design Apple's next-generation verification methodology and test benches to improve efficiency and effectiveness. Run and triage regressions to identify and resolve issues in the chip design. Track issues and evaluate coverage data to ensure thorough testing and verification coverage. Communicate actively and collaborate with design, architecture, and software teams to understand use cases and corner conditions for driving effective test case development. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $174,149 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location.

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum Qualifications Master’s degree or foreign equivalent in Electrical Engineering or related field.

Experience and/or education must include:

Developing reusable SystemVerilog test benches with constraint-random and directed stimulus, monitors, checkers, and coverage points to validate design functionality. Applying Object-Oriented Programming (OOP) principles - encapsulation, abstraction, inheritance, and polymorphism - to build cycle-accurate and transaction-accurate behavior models. Implementing Universal Verification Methodology (UVM) to design scalable, modular, and reusable verification environments aligned with project verification plans. Producing verification and coverage plans to provide accurate estimation of verification effort, ensuring alignment with project schedules and deliverables. Automating regression workflows by scripting in Python, Ruby, or Perl, including generating result charts and reusable verification components. Executing simulations using industry-standard tools, including Cadence Xcelium, to compile, run, and profile verification environments for RTL validation. Analyzing simulation traces with waveform debuggers (e.g., Verdi, Indago) to identify design bugs and validate signal interactions. Utilizing UNIX/Linux command-line utilities for file manipulation, data searching, and automation of common tasks to improve workflow efficiency. Designing and debugging algorithmic reference models to validate hardware functional correctness and performance characteristics. Collaborating with cross-functional teams to integrate verification strategies with design and architecture requirements, ensuring timely delivery of project milestones.

Preferred Qualifications N/A

LMT Footer This position is not subject to the application limits.

EEO Statement Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

Accessibility At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here - in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Learn about accessibility in Apple’s workplace

Learn about reasonable accommodations for job applicants

Application Deadline Apple accepts applications to this posting on an ongoing basis.

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More about this job

Skills

Electrical engineering
SystemVerilog
Object-oriented programming
Estimating
Python
Ruby
Perl
RTL
Debuggers
UNIX
Linux
Workflow
Debugging
Architecture regulations

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