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Added 1 hour ago
Principal Silicon Test Engineer - TeraWave
Blue Origin Personnel, LLC
San Diego, CA · Cupertino, CA
Blue Origin is seeking a Principal ASIC Test Engineer to lead production test strategy for RF, mmWave, and mixed-signal integrated circuits within Silicon Systems.
Added 9 hours ago
Solar Array Responsible Engineer-Project Sunrise
Blue Origin Personnel, LLC
Denver, CO
…technicians, and engineers, you will serve as the box Responsible Engineer (RE) for our Power Regulator products supporting Project Sunrise. Our Power Regulator product line regulates power…
Added 17 hours ago
Principal ASIC DFT Design Engineer - Terawave
Blue Origin Personnel, LLC
Cupertino, CA · San Diego, CA
As a Principal ASIC DFT Designer on the ASIC Engineering SOC Team, you will own design for test architecture for the TeraWave System on Chip (SOC) program. You will define the test strategy…
Added 19 hours ago
Senior Modem Engineer, Satellite Communication
Amazon Kuiper Manufacturing Enterprises LLC
San Diego, CA
· Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic errors, and propose…
Added 22 hours ago
VLSI Physical Design Engineer
Hewlett Packard Enterprise
Ft. Collins, CO · Chippewa Falls, WI · Bloomington, MN
This position provides an opportunity to contribute to the development of sophisticated ASIC products while partnering with experts across architecture, design, physical implementation,…
Added 22 hours ago
Engineer II - Physical Design
Microchip - USA
Chandler, AZ
Join the Physical Design team as a Engineer II-Physical Design supporting semiconductor synthesis, floorplanning, placement, clocking, routing, timing, power, physical verification,…
Added 1 day ago
DFT Engineer
Quest Global
San Jose, CA
We are seeking a highly experienced Design for Test (DFT) Engineer to contribute to the development of complex SoC/ASIC designs. This role will focus on DFT planning, integration, testing…
Added 1 day ago
Principal FPGA Emulation Engineer
Renesas Electronics
Austin, TX
ASIC design or tape-out exposure, including DFT/scan considerations in emulation.
Added 2 days ago
Sr. SOC Physical Verification Engineer (Silicon Engineering)
SpaceX
Palo Alto, CA · Austin, TX · Irvine, CA · Sunnyvale, CA
We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation,…
Added 2 days ago
Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team
Amazon
Austin, TX
…integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the…
Added 2 days ago
Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration - Annapurna Labs
Amazon
Austin, TX
…integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the…
Added 2 days ago
ASIC DFT Engineer
Cisco Systems, Inc.
Austin, TX · San Jose, CA
You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a member of this team you will…
Added 2 days ago
ASIC Physical Design Engineer
Cisco Systems, Inc.
San Jose, CA
As a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII implementation flow for advanced semiconductor nodes. You will optimize floor planning and timing, analyze…
Added 2 days ago
EDA and CAD Lead Engineer / Manager
AttoTude
Bethlehem, PA · Menlo Park, CA
We are seeking an experienced EDA/CAD lead engineer to join our growing team. In this role, you will be part of the experience design and layout team to develop cutting-edge mixed-signal…
Added 2 days ago
Senior ASIC Design Engineer - Hardware
Nvidia
Santa Clara, CA
We are now looking for an ASIC Design Engineer. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading SoC's and GPU's. This position offers the…
Added 2 days ago
RTL Design Engineer
Advanced Micro Devices, Inc
Austin, TX
We are seeking a highly motivated RTL IP Design Engineer to join AMD's Security IP (SECIP) Design team. The team is responsible for the architecture, design, and verification of a broad…
Added 2 days ago
Chip Lead
Advanced Micro Devices, Inc
Santa Clara, CA
…validation, and production. This role is ideal for an experienced engineer who enjoys solving complex problems, working across technical boundaries, and growing toward broader chip-level…
Added 2 days ago
ASIC Physical Design Principal Engineer
Cisco
San Jose, CA
Work closely with RTL, DFT, implementation, EDA vendors, and tool/flow teams to enable best-in-class design methodology.
Added 2 days ago
MI
Staff Digital IC Design Engineer
MaxLinear, Inc.
Irvine, CA
- $110,000 to $165,000 USD / year
MaxLinear is seeking a Staff Digital IC Design Engineer to join our team. In this role, you will focus on the following:
Added 2 days ago
ASIC DFT Engineer - Acacia (Hybrid)
Cisco Systems, Inc.
San Jose, CA
We are looking for a Design-for-Testability (DFT) Engineer to support DFT implementation, validation, and signoff for complex ASIC / SoC designs. The ideal candidate will have hands-on…
Added 3 days ago
DFT Engineer (CE-64000845)
Cirrus Logic
Austin, TX · Chandler, AZ · Greensboro, NC
As a DFT engineer in our mixed signal audio development team, you will be performing initial test planning, inserting memory BIST and scan, improving coverage, and delivering test patterns…
Added 3 days ago
Hardware Design Engineer Technical Lead
Cisco Systems, Inc.
Remote, United States
The individual is expected to bring up the system to work with multiple groups including ASIC, DFT, Signal Integrity, software, Diagnostics and Manufacturing team to resolve any design…
Added 3 days ago
Power Regulator Responsible Engineer, Project Sunrise
Blue Origin Personnel, LLC
Longmont, CO
…technicians, and engineers, you will serve as the box Responsible Engineer (RE) for our Power Regulator products supporting Project Sunrise. Our Power Regulator product line regulates power…
Added 3 days ago
IC Package Design Engineer
Rivian
Palo Alto, CA · Irvine, CA
…generations. Role Summary We are seeking an IC Package Design Engineer to join our ASIC team. In this role, you will lead the physical layout, modeling, and analysis of advanced…
Added 4 days ago
Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team
Annapurna Labs (U.S.) Inc. - D63
Austin, TX
…integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the…

Amazon

Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team

Austin, TX, United States

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Job details

Posting language: English
Posted: Aug 15, 2025

Original job description

Description

Utility Computing (UC)

AWS Utility Computing (UC) provides product innovations - from foundational services such as Amazon’s Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS’s services and features apart in the industry. As a member of the UC organization, you’ll support the development and management of Compute, Database, Storage, Internet of Things (Iot), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for customers who require specialized security solutions for their cloud services.

Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago - even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.

About AWS

Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating - that’s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses.

Diverse Experiences

AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.

Work/Life Balance

We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there’s nothing we can’t achieve in the cloud.

Inclusive Team Culture

Here at AWS, it’s in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness.

Mentorship & Career Growth

We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.

Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.

Key job responsibilities

integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routing
As a key member of the ASIC design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
Analyze design, microarchitecture or architecture to make trade-offs based on features, power, performance or area requirements.
Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/timing clean design with constraints.
Perform lint and clock domain crossing quality checks on the design.
Work with with architects, other designers, verification teams, pre- and post-silicon validation teams, synthesis, timing and back-end teams to accomplish your tasks.

You will thrive in this role if you:

Are familiar with scripting in Python
Are proficient with assertions
Have good debug skills to analyze RTL test failures
Have a "Learn and Be Curious" mindset

About the team

Our team is dedicated to supporting new members. We have a broad mix of experience levels and tenures, and we’re building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind, code reviews. We care about your career growth and strive to assign projects that help our team members develop your engineering expertise so you feel empowered to take on more complex tasks in the future.

Basic Qualifications

B.S. in Electrical Engineering or related technical field
5+ years in RTL design for SOC
5+ years of VLSI engineering
5+ years with code quality tools including: Spyglass, LINT, or CDC

Preferred Qualifications

Master's degree in electrical engineering, computer engineering, or equivalent
Experience with Microarchitecture, SystemVerilog RTL, Assertions, SDC constraints
Experience with automation and scripting languages such as Python
Familiarity with data path design, interconnects, AXI protocol
Good analytical, problem solving, and communication skills

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.

The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits .

USA, TX, Austin - 185,200.00 - 250,000.00 USD annually

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