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Added 1 min ago
Senior Commercialization Process Engineer
Natera
San Carlos, CA
Natera is seeking a Senior Commercialization Process Engineer to serve as the critical bridge between assay development and scalable lab production. This bench-level role is embedded early…
Added 2 mins ago
D
Software Engineer - Applied AI
Deepgram
San Francisco, CA
- $173,800 to $212,400 USD / year
- Comfortable working across languages. Our stack is mainly Kotlin and Python, with TypeScript on the front end.
Added 3 mins ago
O
Principal Site Reliability Automation Developer - US REMOTE
Oracle
Montpelier, VT
- $102,300 to $209,500 USD / year
Lead complex production investigations and engineer durable long-term fixes
Added 3 mins ago
Senior Analyst, Compliance Technology
Coinbase
Montpelier, VT
We're hiring an Analytics Engineer to join the Compliance Technology team within the Platform organization. This team builds and operates data and detection capabilities that enable…
Added 3 mins ago
Quality Engineer, AI & Test Automation
Baylor Scott & White Health
Montpelier, VT
· The Quality Engineer, AI & Test Automation helps modernize BSWH’s quality approach by moving beyond traditional manual testing toward automation-first, engineering-integrated, and…
Added 3 mins ago
Senior Financial Planning & Analysis Manager
Cornerstone OnDemand
Burlington, VT
Support software capitalization analysis with Accounting and track engineering efficiency metrics (e.g., R&D as a percent of revenue, cost per engineer)
Added 3 mins ago
Core Senior .NET Software Engineer
Evolent
Montpelier, VT
The Senior Software Engineer leads the design, development, and deployment of complex software solutions, ensuring scalability and maintainability. This role architects and implements…
Added 5 mins ago
Software Engineer, Triage Services
Apple
Cupertino, CA
Strong Python and system design skills, with a track record of owning architecture for services other teams depend on.
Added 8 mins ago
AI Engineer
RJW Logistics Group
Romeoville, IL
Strong Python skills and solid software development practices, including Git, code review, testing, and deployment.
Added 10 mins ago
Security Engineer, Field Innovation, Security Search and Observability (SSO)
Amazon Development Center U.S., Inc.
Austin, TX · Arlington, VA · Santa Clara, CA
We are hiring a Security Engineer to work at the intersection of customer impact and AI. Our team builds and operates the detection, correlation, and vulnerability-management capabilities…
Added 11 mins ago
Hardware Systems Engineer, Hardware Tools / Firmware
Cloudflare
Austin, TX
Cloudflare’s Hardware Team is hiring a Systems Engineer, with a firmware focus, in the U.S. to help deliver the Hardware team’s security goals and projects in 2027 & beyond.
Added 11 mins ago
Hardware Systems Engineer - AI Hardware
Cloudflare
Austin, TX
…as well as PDUs and network hardware. As a Hardware Systems Engineer, you will work with colleagues on the Engineering teams, Product and Performance teams, and Hardware Sourcing teams to…
Added 13 mins ago
Senior ASIC Silicon Validation Engineer (NetSec)
Palo Alto Networks, Inc.
CA
As a Silicon Validation Engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products meet or exceed industry-leading requirements for…
Added 13 mins ago
Failure Analysis Engineer
Palo Alto Networks, Inc.
United States
Palo Alto Networks is looking for a Failure Analysis Engineer for the Technical Operations team. This individual will work collaboratively with the HW Engineering, SW Engineering and…
Added 13 mins ago
Principal Site Reliability Engineer (AIOps)
Palo Alto Networks, Inc.
CA
Palo Alto Networks runs a large hybrid infrastructure and is one of the largest GCP customers. As a Sr Principal DevOps Engineer, you will be part of a team supporting the services running…
Added 14 mins ago
AVP, DevOps Engineer
LPL Financial Corp
Austin, TX
7+ years experience leading automation initiatives using programming and scripting languages such as Python, Go, Java, or similar technologies.
Added 15 mins ago
Senior Software Engineer
Advantest
San Jose, CA · Austin, TX
Advantest is seeking a Software Engineer to join the US AI and Automation Team. In this role, you will help design, develop, and deploy software solutions that integrate AI capabilities…
Added 15 mins ago
Solutions Engineer, Splunk
Cisco Systems, Inc.
Remote, United States
Splunk, a Cisco company, is looking for a Solutions Engineer to be the trusted technical advisor for a set of enterprise accounts. You’ll help customers get real value from the Splunk…
Added 17 mins ago
Applications Engineer
SiTime Corporation
AZ
We are actively hiring for a new position as an applications engineer. In this position, the candidate will help customers to use our PLL-based timing products and should be familiar with…
Added 17 mins ago
Software Engineer Senior
GD Information Technology, Inc.
United States
As a Software Engineer Senior at GDIT, you will design, develop, integrate, and sustain secure software applications and data-driven solutions that support complex mission requirements.…
Added 18 mins ago
Data Engineer
Booz Allen Hamilton_United States
Tampa, FL
…unstructured data available today than ever before. As a data engineer, you know that organizing data can yield pivotal insights when it’s gathered from disparate sources. We need a data…
Added 18 mins ago
Site Reliability Engineer
Booz Allen Hamilton_United States
Reston, VA
As a Site Reliability Engineer (SRE) on our team, you'll help support and sustain a production Kubernetes-based platform operating within the Intelligence Community. You'll perform platform…
Added 18 mins ago
Embedded FPGA Engineer
Booz Allen Hamilton_United States
McLean, VA
We are seeking a motivated FPGA and software engineer to support the development, optimization, and deployment of digital signal processing (DSP) functions on a SOSA VPX system. As a member…
Added 18 mins ago
Cloud Infrastructure & Core Services DevOps Engineer
Booz Allen Hamilton_United States
North Charleston, SC · Washington, DC
Everyone is trying to “harness the cloud,” but not everyone knows how. As a DevOps engineer, you’re eager to build, manage, and secure a container platform that meets your client’s needs…
Added 18 mins ago
University, AI RAN Telecommunications Engineer Intern
Booz Allen Hamilton_United States
McLean, VA
University, AI RAN Telecommunications Engineer InternThe Opportunity:

Altera Corporation

Senior Lead Design Engineer

San Jose, CA, United States

$231,500 - $330,000 USD

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Job details

Pay: $231,500 - $330,000 USD
Posting language: English
Posted: Nov 4, 2026

Original job description

Job Details:

Job Description:

About the Role Altera is seeking a Senior Lead Design Engineer to provide hands-on technical leadership for the architecture, design, and delivery of next-generation FPGA and programmable SoC solutions. This is a senior individual-contributor/technical leadership role for an engineer who can influence technical direction across complex subsystems, product generations, and global engineering teams.

In this role, you will lead the definition and implementation of high-performance digital logic and reusable IP for programmable devices and platform solutions. You will translate product and system requirements into scalable architectures, drive key design decisions, and guide execution from early concept through RTL delivery, validation, and product readiness. The successful candidate will bring deep experience in complex ASIC, SoC, or FPGA development, a rigorous approach to design quality, and the ability to deliver impactful solutions for data center, networking, AI, and edge applications.

Responsibilities

Lead architecture, microarchitecture, and RTL development for complex FPGA, programmable SoC, and infrastructure-class subsystems, with emphasis on high-throughput datapaths, connectivity, interconnect, memory access, or programmable acceleration.
Define technical requirements, interfaces, architectural specifications, and implementation plans that align hardware, firmware, software, validation, and product objectives.
Drive technical tradeoffs across performance, power, area, latency, bandwidth, reliability, scalability, cost, and schedule; use data and analysis to identify and mitigate execution risk.
Own critical blocks and subsystems through the full development lifecycle, including RTL implementation, synthesis, integration, verification support, timing closure, bring-up, performance characterization, and issue resolution.
Establish and scale reusable design IP, coding standards, automation, and quality methodologies that improve engineering velocity, portability, predictability, and first-pass success.
Partner with architecture, design verification, physical design, DFT, CAD, firmware, software, emulation, FPGA prototyping, board, and post-silicon teams to ensure architectural intent is maintained through product delivery.
Lead resolution of complex cross-functional design and system issues, including root-cause analysis, debug strategy, and technical decision-making.
Provide technical mentorship and design leadership across teams; raise the engineering bar through architecture reviews, code reviews, and constructive technical guidance.
Influence engineering roadmaps and collaborate with internal teams and external partners on IP, tools, and technology choices that strengthen Altera’s programmable technology portfolio.

What You Will Bring You are a hands-on design leader who pairs strong technical depth with broad systems perspective. You bring sound engineering judgment, a high bar for quality, and a collaborative leadership style that helps teams solve complex problems and deliver differentiated programmable solutions. You are motivated by enabling customers to create what is next with Altera technology.

Salary Range The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.

$231,500 - $330,000 USD

We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.

Qualifications:

Minimum Qualifications

Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical discipline, with 15+ years of relevant experience in FPGA, ASIC, SoC, or semiconductor product development; advanced degree preferred.
Demonstrated technical leadership delivering complex digital subsystems or products from system architecture and microarchitecture through RTL, verification, integration, implementation, and post-silicon or hardware validation.
Deep hands-on expertise in Verilog and/or SystemVerilog RTL design, synthesis, lint, CDC/RDC, formal or equivalence checking, timing constraints, and implementation-aware design practices.
Proven experience with high-performance digital architectures, such as networking or packet-processing datapaths, offload or acceleration engines, PCIe/CXL, Ethernet, DDR/HBM memory subsystems, high-speed interfaces, or on-chip interconnect.
Strong understanding of performance, power, area, timing, bandwidth, latency, congestion, and reliability tradeoffs in advanced digital systems.
Experience leading design execution across multiple functional blocks or chip-level integration, including planning, risk management, schedule alignment, and technical prioritization.
Demonstrated ability to collaborate and influence across architecture, RTL, verification, physical design, CAD, firmware/software, system validation, and product engineering organizations.
Strong written and verbal communication skills, with the ability to clearly communicate architecture, design intent, technical risks, and recommendations to diverse audiences.

Preferred Qualifications

Experience in FPGA architecture, programmable-logic devices, configurable interconnect, SmartNICs, IPUs, SoCs, or data-center acceleration platforms.
Experience building or maintaining reusable design IP deployed across multiple products, programs, or technology nodes.
Experience with FPGA prototyping, emulation, silicon bring-up, post-silicon debug, or performance optimization.
Proficiency in scripting and workflow automation using Python, Tcl, Perl, or shell.
Experience leading teams or serving as a senior technical mentor in a matrixed engineering environment.
Record of innovation through patents, publications, standards contributions, or technical thought leadership.

Job Type:

Regular

Shift:

Shift 1 (United States of America)

Primary Location:

San Jose, California, United States

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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More about this job

Skills

Leadership
RTL
Define technical requirements
Firmware
DFT
Root cause analysis
Decision making
Electrical engineering
Computer engineering
Verilog
SystemVerilog
Risk management
Prioritization
Communication skills
Workflow
Python
Perl

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