Jobs in the United States

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Added 23 mins ago
CU
Part-Time Online Course Facilitator: AI/ML Technology and Architecture
Cornell University
Remote, United States
- Part-time
Providing personalized and constructive feedback (written and recorded video) on discussion boards, assignments, Python coding projects in Jupyter notebooks, and written analyses, such as…
Added 1 hour ago
Senior Backend Cloud Engineer
Halcyon
Remote, United States
…As part of that vision, we’re looking for a Senior Backend Engineer to join our cloud team. You’ll lead the development and evolution of our data platform and API services, working within a…
Added 1 hour ago
Application Support Technical Team Lead
Kastel Staffing
Sandy Springs, GA
We are looking for a Technical Support Team Lead to join our Technical Support Team in Atlanta. This team is responsible for providing support and service to our clients
Added 1 hour ago
O
Principal Core Infrastructure Engineer
Oracle
Austin, TX
- $114,600 to $234,600 USD / year
Oracle Cloud Infrastructure (OCI) is hiring a Principal Core Infrastructure Engineer to join the Next Gen Network Observability team. Help build cloud-scale intelligence systems that enable…
Added 2 hours ago
Offensive Security AI Engineer
Micron Technology
Boise
The Offensive Security AI Engineer will plan and implement adversary-informed security testing across Micron's technology environment. The role is intentionally broader than AI security:…
Added 2 hours ago
SRAM Design Lead
Micron Technology
Boise · Albany
Micron is seeking an experienced SRAM Design Engineer to develop high-performance, low-power embedded memory IP and testchip content. This is for advanced semiconductor technologies. The…
Added 2 hours ago
Sr. Yield Enhancement Electrical Failure Analysis Engineer
Micron Technology
Boise
JR109607 Sr. Yield Enhancement Electrical Failure Analysis Engineer
Added 2 hours ago
Principal Software Engineer - Simulation Data, Validation & Infrastructure
Irving, TX
…intelligent automation, and rigorous validation. This Principal Engineer role is a hands-on technical leadership position responsible for architecture, critical implementation, engineering…
Added 2 hours ago
Principal Software Engineer - Robotics & Physical AI Simulation
Irving, TX
This Principal Engineer role is a hands-on technical leadership position responsible for architecture, critical implementation, engineering standards, cross-team alignment, and mentoring.
Added 2 hours ago
Principal Software Engineer - Digital Twin and Simulation Platform
Irving, TX
This Principal Engineer role is a hands-on technical leadership position responsible for architecture, critical implementation, engineering standards, cross-team alignment, and mentoring.
Added 2 hours ago
Principal Software Engineer - Agentic AI & Simulation Automation
Irving, TX
This Principal Engineer role is a hands-on technical leadership position responsible for architecture, critical implementation, engineering standards, cross-team alignment, and mentoring.
Added 2 hours ago
Solution Architect (AWS / AI)
CapNexus
NY
Partner with the Lead Engineer as a peer: you decide the architecture, and they decide the implementation approach.
Added 2 hours ago
Forward Deployed Solution Engineer – Applied AI FDE
ServiceNow
Remote, United States
It all started when engineer Fred Luddy wrote code that automated a tedious task for his coworker, Phyllis. She cried tears of joy. That moment inspired Fred to build a company that could…
Added 2 hours ago
DevOps II / SRE
Robert Half
Philadelphia, PA
We are seeking a DevOps II / Site Reliability Engineer to help build and mature a growing Site Reliability Engineering (SRE) function supporting large-scale digital platforms. This role…
Added 2 hours ago
Lead Engineer, IAM Platform Engineering
AmerisourceBergen
Conshohocken, PA
…platforms. 5. Experience developing automation using PowerShell, Python, JavaScript, Terraform, REST APIs, or similar technologies. 6. Strong understanding of identity protocols including…
Added 3 hours ago
PI
Senior Principal AI Research Engineer
Pfizer Inc
WA · CA · MA · CT · NY
- $139,100 to $231,900 USD / year
…deployment. Rather than contributing to isolated components, you'll lead the design and delivery of end-to-end systems that directly enable scientific…
Added 3 hours ago
PI
Senior AI Research Engineer
Pfizer Inc
WA · CA · MA · CT · NY
- $106,000 to $176,600 USD / year
…deployment. Rather than contributing to isolated components, you'll lead the design and delivery of end-to-end systems that directly enable scientific…
Added 3 hours ago
TT
Senior Forward Deployed Engineer, Operate
True Talent Solutions Partners
New York, NY
- $170,000 to $205,000 USD / year
- Lead client engagements from pre-sales demonstrations and requirements gathering through architecture, integration, launch, and post-launch support.
Added 3 hours ago
AI Engineer 4 (AI Foundations: World Model, RL, Causal Inference, Sequential Data)
Capital One
McLean, VA · Cambridge, MA · San Jose, CA · NY
Lead cross-functional technical reviews for new AI system deployments, ensuring security, data governance, and compliance standards are met
Added 3 hours ago
AI Engineer 5 (AI Foundations: Evaluations and Agentic Workflows)
Capital One
McLean, VA · San Francisco, CA · Cambridge, MA · San Jose, CA · NY
Establish and lead cost-performance governance reviews across AI systems, tracking GPU utilization, model throughput, and inference cost efficiency
Added 3 hours ago
Director, Full-Stack Engineer - AML (Anti Money Laundering)
Capital One
NY · McLean, VA · Cambridge, MA
As a Director, Full-stack Engineer at Capital One, you will lead high-performing engineering teams working to define the future of banking in the cloud. You will partner closely with…
Added 3 hours ago
A
Sr. Lead Application Developer
ADP
Roseland, NJ
- $107,400 to $264,300 USD / year
ADP Innovation Labs is looking for a Sr. Lead Software Engineer with extensive NodeJS experience to join an emerging team.
Added 3 hours ago
T
Senior Back End Engineer
TEKsystems
Jersey City, NJ
- $70 to $85 USD / hour
As Software Development Engineer, you will own the technical direction of MCC-Field from R0
Added 3 hours ago
AT
Information Security Solutions Engineer II
Auto Truck Group LLC
Trenton, NJ
- $105,050 to $149,700 USD / year
Holman is looking for a Security Engineer to work where cloud infrastructure and software development meet. You will review and design security architecture for our cloud environments,…
Added 3 hours ago
Senior DBA -1 (Database Reliability Engineer)
LexisNexis Risk Solutions FL Inc. Company
Remote, United States
As a Database Engineer (DBA), you will design, build, automate, and operate mission-critical database platforms in a cloud-first environment. This is a hands-on engineering role for someone…

Altera Corporation

Senior Lead Design Engineer

San Jose, CA, United States

$231,500 - $330,000 USD

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Job details

Pay: $231,500 - $330,000 USD
Posting language: English
Posted: Nov 4, 2026

Original job description

Job Details:

Job Description:

About the Role Altera is seeking a Senior Lead Design Engineer to provide hands-on technical leadership for the architecture, design, and delivery of next-generation FPGA and programmable SoC solutions. This is a senior individual-contributor/technical leadership role for an engineer who can influence technical direction across complex subsystems, product generations, and global engineering teams.

In this role, you will lead the definition and implementation of high-performance digital logic and reusable IP for programmable devices and platform solutions. You will translate product and system requirements into scalable architectures, drive key design decisions, and guide execution from early concept through RTL delivery, validation, and product readiness. The successful candidate will bring deep experience in complex ASIC, SoC, or FPGA development, a rigorous approach to design quality, and the ability to deliver impactful solutions for data center, networking, AI, and edge applications.

Responsibilities

Lead architecture, microarchitecture, and RTL development for complex FPGA, programmable SoC, and infrastructure-class subsystems, with emphasis on high-throughput datapaths, connectivity, interconnect, memory access, or programmable acceleration.
Define technical requirements, interfaces, architectural specifications, and implementation plans that align hardware, firmware, software, validation, and product objectives.
Drive technical tradeoffs across performance, power, area, latency, bandwidth, reliability, scalability, cost, and schedule; use data and analysis to identify and mitigate execution risk.
Own critical blocks and subsystems through the full development lifecycle, including RTL implementation, synthesis, integration, verification support, timing closure, bring-up, performance characterization, and issue resolution.
Establish and scale reusable design IP, coding standards, automation, and quality methodologies that improve engineering velocity, portability, predictability, and first-pass success.
Partner with architecture, design verification, physical design, DFT, CAD, firmware, software, emulation, FPGA prototyping, board, and post-silicon teams to ensure architectural intent is maintained through product delivery.
Lead resolution of complex cross-functional design and system issues, including root-cause analysis, debug strategy, and technical decision-making.
Provide technical mentorship and design leadership across teams; raise the engineering bar through architecture reviews, code reviews, and constructive technical guidance.
Influence engineering roadmaps and collaborate with internal teams and external partners on IP, tools, and technology choices that strengthen Altera’s programmable technology portfolio.

What You Will Bring You are a hands-on design leader who pairs strong technical depth with broad systems perspective. You bring sound engineering judgment, a high bar for quality, and a collaborative leadership style that helps teams solve complex problems and deliver differentiated programmable solutions. You are motivated by enabling customers to create what is next with Altera technology.

Salary Range The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.

$231,500 - $330,000 USD

We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.

Qualifications:

Minimum Qualifications

Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical discipline, with 15+ years of relevant experience in FPGA, ASIC, SoC, or semiconductor product development; advanced degree preferred.
Demonstrated technical leadership delivering complex digital subsystems or products from system architecture and microarchitecture through RTL, verification, integration, implementation, and post-silicon or hardware validation.
Deep hands-on expertise in Verilog and/or SystemVerilog RTL design, synthesis, lint, CDC/RDC, formal or equivalence checking, timing constraints, and implementation-aware design practices.
Proven experience with high-performance digital architectures, such as networking or packet-processing datapaths, offload or acceleration engines, PCIe/CXL, Ethernet, DDR/HBM memory subsystems, high-speed interfaces, or on-chip interconnect.
Strong understanding of performance, power, area, timing, bandwidth, latency, congestion, and reliability tradeoffs in advanced digital systems.
Experience leading design execution across multiple functional blocks or chip-level integration, including planning, risk management, schedule alignment, and technical prioritization.
Demonstrated ability to collaborate and influence across architecture, RTL, verification, physical design, CAD, firmware/software, system validation, and product engineering organizations.
Strong written and verbal communication skills, with the ability to clearly communicate architecture, design intent, technical risks, and recommendations to diverse audiences.

Preferred Qualifications

Experience in FPGA architecture, programmable-logic devices, configurable interconnect, SmartNICs, IPUs, SoCs, or data-center acceleration platforms.
Experience building or maintaining reusable design IP deployed across multiple products, programs, or technology nodes.
Experience with FPGA prototyping, emulation, silicon bring-up, post-silicon debug, or performance optimization.
Proficiency in scripting and workflow automation using Python, Tcl, Perl, or shell.
Experience leading teams or serving as a senior technical mentor in a matrixed engineering environment.
Record of innovation through patents, publications, standards contributions, or technical thought leadership.

Job Type:

Regular

Shift:

Shift 1 (United States of America)

Primary Location:

San Jose, California, United States

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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More about this job

Skills

Leadership
RTL
Define technical requirements
Firmware
DFT
Root cause analysis
Decision making
Electrical engineering
Computer engineering
Verilog
SystemVerilog
Risk management
Prioritization
Communication skills
Workflow
Python
Perl

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